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The "second front page" is http://wilsonminesco.com/links.html .
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Another great video by Bill Herd on this subject:

https://www.youtube.com/watch?v=OQm0aBw_ep8

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Bill

marcelk (from the Gigatron design team) posted a link to an informative Dave Jones video (EEVblog #1176), over on the Gigatron forum. Dave Jones has built two Gigatrons, one is the 'standard' two-layer board, another is a four-layer board, and what's unique is that the two boards are exactly the same as far as the signal traces are concerned. You have to look closely to notice that one is a four-layer board. Then he measures near field emissions of the two boards. Very interesting.

https://www.youtube.com/watch?v=crs_QLuUTyQ

(The gigatron forum posting I took this from: https://forum.gigatron.io/viewtopic.php?f=4&t=85)

Thanks! One takeaway is that you can build a mass-market product clocked a little over 6MHz with a two layer board. (I really want it to be true, and for every beginner to know, that four layers and ground planes are not necessary for modest projects!)

In the 2nd part of the video Dave is showing the traces and the path of the return current. You can see that the ground "planes" don't actually extend between 2 neighboring pins of the DIP packages, even though you can see traces fit through there. If a trace fits, then the ground pour should also fit.

A simple way to improve this particular 2 layer design is to adjust the clearance parameter on the pours so that the ground planes will actually go between the pins. This is simple and free, and will probably get you a very decent improvement.

The defaults provided by the PCB design program may be too conservative for the capabilities of the PCB fab, so I would recommend first picking a manufacturer, find out what they offer in terms of clearance, track width, and drill sizes, and then use those settings in the PCB design program. Some manufacturers actually provide ready-made design rule files that can be imported in the program.

In addition to checking clearance and track width, it's worth it to take a good look at the pad size and drill diameter. Maybe the default drill and pad can be reduced a bit to fit more between. As an example, here's a screenshot of a 2 layer board (the 6502 sandbox) I did. It was designed for Eurocircuit design rules, as offered in their basic (lowest cost) option. As you can see, there's room for 3 wires between 2 pins @ 100 mil spacing, or, in this case, a single wire plus ground on either side.

Just a few hours of prep work here can save a lot of effort and performance later.

Well-spotted, dank je wel! We helped the pour algorithm a bit by manually running some dummy ground trace between pins. In a next spin I'll tweak with these settings, it makes so much more sense. I don't know if it will do much. There's a reason home computers came in faraday cages. Dave also makes a good point about the caps. I think at that point we can simply do a 4-layer board, but keep the 2-layer retro"look" with the pours as-is.


Trust me, TTL computer DIY soldering kits are not a mass market thing.

Question: if PCB traces require a ground-plane for a clean return path of high-frequency signals, and ribbon cables require every other strand to be grounded for the same reason, why do wire-wrapped circuits work as well as they do?

PS. I used a 2-layer board in OberonStation, an FPGA-based Oberon workstation. It ran a 25-MHz CPU (60MHz crystal) with external memory and IO with no apparent problems...https://web.archive.org/web/20180102133953/http://oberonstation.x10.mx:80/

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Because the risks are over-stated, and the need for reliability of a hobby or prototype system is completely different from the need of a mass production or life-critical system. The latter may well 'require' good attention to signal integrity, the former may only 'benefit from' such attention.

Edit: that said, if a beginner is trying to debug a design, it's helpful if they haven't built it in a way which is inherently unreliable.

Further to the design of a good printed circuit board, here is a link to a trace width calculator that may be useful.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

POC V1.1 is running on my desk at 14.1 MHz and when scoped, looks pretty clean. Signal traces are 6 mil and the board is four layers, with 1 ounce copper. The four-layer construction shows its value in the general quietness of the unit and the absence of ground bounce.

For most of us, transmission line effects should not be a problem—assuming construction is with tight wire-wrap or on a PCB with a reasonable layout. Many of our gadgets don't run all that fast and even the ones that do run fast aren't running fast enough for signal propagation time and all that that entails to cause any grief. More likely, trouble will arise from very fast signal edges, which are characteristic of the high-speed logic families.

Nevertheless, knowing some transmission line theory can help with physical design. In that regard, Dr. Johnson is considered an expert among experts and I highly recommend his material. Yes, it's technical and some of it may be math-intensive, but his expositions are written in a lucid style and are understandable. In other words, you won't need an advanced degree to learn something.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I am new to creating PCBs and yesterday I started reading this thread. A hole new world opened but at the end I was really confused. There was only one light in the dark for me: I checked various XT clone turbo boards and many of them were just two layers, no plane filling and no terminators. And they work at 8 MHz. So there is still hope for my designs.

What I could use is document explaining some basic rules or guide lines for dummies:
- How wide should signal traces be? Is wider better or even worse? Other basic rules like no sharp angles?
- Is there a maximum length, or better, are there rules regarding length?
- When to use termination? Should it be 220/330 or can a bunch of 10 K resistors be OK as well? (found them on various PC motherboards as terminators)
- When is four layers a must?
- If using two layers, what should taken care of / where should be paid extra attention to?
- If using two layers, when should copper filling be applied? Or maybe when not? (Is this filling between the traces called the ground plane?)
- Are there rules where capacitors should be placed? ( I now put them if there is place available and near the IC)

If you can answer only a few of the questions, I don't mind to collect all answers and to create this document for the benefit of all.

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I think one reason this thread might come across as shocking is that it includes all sorts of advice, ranging from 'this is absolutely necessary for anything to work' to 'this is appropriately conservative for volume production.'

Commonly enough you'll also see phrases like 'as close as possible' or 'as short as possible' which again don't quite mean what they seem to: 'closer is better' and 'shorter is better' might be improvements.

The key word, I think, is 'reliable' - and there are various levels of acceptable reliability. Again, a one-off build which you're prepared to investigate and debug is one thing, a design for volume production with high yield, reliable operation in the field, and negligible customer returns, is another.

But I think it's true that there's some truth behind each piece of advice: what's difficult is the sense of judgement, as to which is most important and how much difference it makes.

It is of course very much harder to say how much each millimetre of distance between an IC and its bypass capacitor is worth, than to say the capacitor should be as close as possible. It's probably true that it's less critical if the IC doesn't draw so much peak current, or is of a family which has better voltage margins, or if the power distribution is low resistance and low inductance.

It would be good to have rules of thumb, relating to choice of logic family, maximum speed, number of strobes, clocks, and pulses, style of power distribution. The thing is, these various degrees of freedom interact.

Sorry, this is not an immediately helpful response!

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?