You don't need heat for the JVM attack either, that was just the mechanism they used to speed up the process; the shocking aspect of it is that in theory the same attack should work without any physical access or leaky abstractions if you can just leave it for long enough to have a stray cosmic ray ...

Sounds interesting, I will check that out.

Since we're already off topic, my favorite is this clever attack against a Java VM that assumes no conventional write access at all:

Using Memory Errors to Attack a Virtual Machine (PDF, sorry)

It works by allocating lots of objects in a way that ...

Thanks for sharing, that's a really cool exploit.

The part at the end about 6502 code as a "scripting language" and the prevalence of various languages in all sorts of places you wouldn't expect makes one think. There has to be an enormous attack surface here that gets little scrutiny.

I wouldn't ...

Priority decoder output better should be stable when the multiplexer switches, that's all.
Else, some of the priority decoder delay would add to the memory read delay.

If the priority encoder is slow, that just means that the IRQ line is pulled down a few ns later (from the /GS output). The ...

Well, if your CPU would be running at 20MHz, one clock cycle would be 50ns, and a 40ns delay probably would be an issue then... ;)

Again, why? What could you possibly be doing that would be affected by an interrupt coming in one cycle late? (A maximum of one cycle late, with worst-case timings ...

Incidentally, priority encoders are relatively slow devices, as they have a lot of gates.
Priority encoding is a good job for a PLD.
74F148 seems to be out of production, and there seems to be no 74AC\ACT148.
BTW: maybe 20ns propagation delay at 5V for a 74HC148 from TI.

The datasheet says ...

The very first link is now dead, but fortunately it's been archived.

The reason for using page one is precisely because that's where the stack normally lives. If the CPU is acting weird, executing code out of there, that's a fairly unique signal that can be used to control banking on a cycle-by-cycle basis without interfering with anything else. Regular stack ...

Or use page one? Thinking out loud here:

Decoding code fetches from page 1 should be relatively easy: P1_FLAG=SYNC AND ( [A8-A15]=01 ). Connect this signal to logic that forces the bank bits to be all zeroes (or all ones). You could then have small utility routines there, that are always executing ...

This may sound strange, but I have decided to make the schematics and BIT files freely available, but do not plan on releasing my HDL source.

Yep, I'll confirm that does sound strange to me. I've been doodling on a music project for a while (on paper - logic design instead of sudoku) and I've ...

Vfds are basically just an array of tiny vacuum tube "transistors", and have been used in ham radios already as amplifiers...

Seems like something like this would fit the bill: KORG INC and Noritake Co., Limited Release Innovative Vacuum Tube: the Nutube

It even seems to be a DIP! No idea ...

That's a lot of memory. Do you have plans for hardware that can use them?

DRAM seems like a pain to me when there is SRAM - but I've got tons of old memory modules too, would be nice to be able to use them.

This is the fun part where you get to pore over datasheets for hours on end, alternatively hook up several different clock ICs to a scope and observe how they react in every possible variation of inputs.

Generally, you can't assume a thing. If the datasheet doesn't specify a particular relationship ...

If you could start the receiver clock at the perfect time and only wanted to sample once per bit, you could start the clock when you sense the valid leading edge of the start bit, then start sampling half a cycle later (we're already accounting for slew rate), and every cycle after that, until you ...

Take a look at CSRA[3:0] , CSRA[7:4] , etc., described on page 18 of the 26C92 data sheet, to see how to run at 921.6 Kbps.

I've read the datasheet too, and I see a different picture.

Page 2, "DESCRIPTION":
[Each] receiver and transmitter can select its operating speed as one of 27 fixed baud ...