Wow, it was 18 degrees out here yesterday, and will be even warmer today, so my weekend is going to yard work.
I did take an hour to rip up 90% of the two breadboards for my Vulcan-74 Reboot.
The only thing I left was the original VGA Frame Generator, which has been reconfigured to 640 x 480 timing...
This circuit generates both Sync Pulses, and the Blanking Periods.Being made of self contained modules, each section of the circuitry is able to run independently.
So, the VGA Monitor still thinks it's getting a valid signal, even with only this section remaining...
With a valid Horizontal and Vertical Sync, the monitor is happy to display a blank picture.The original Vulcan-74 design called for 400 x 300 resolution, but I found a way to get 640 x 480.
This pushes the breadboard timing about as far as I believe it can go, which calls for the maximum propagation delay to be under 40 nanoseconds through any path. To make this magic happen, I have made several changes to how the VGA Generator works.
Originally, there were four 590 counters driving both the comparators and frame memory. Two counters were used for X (400 pixels) and two for Y (300 lines). To switch between the dual buffers, the counters were fed through dual banks of 74HC574s, cross-wired to act as a large address switch. The VGA Generator had one bank, while the GPU had the other.
in order to meet the insane 40ns maximum delay, I had to remove the address switch and come up with another alternative.
Interestingly, the result was a much cleaner pathway, and one less IC required.
instead of switching the counters through the buffers, I just used the OE lines on the 590 counters, and added 8 more of them!
So now the VGA Frame Generator has its own X/Y counters, and so does each of the Video Buffers.
Sound confusing?? here is how it works...
VGA Frame Generator : X/Y counters always running, and driving the comparators directly.
VGA Buffer One : X/Y counters enabled while GPU has control of Buffer Two.
VGA Buffer Two : Input Buffers enabled while X/Y counters have control of Buffer One.
Buffer Switch : Invert the state of Buffer One and Two during the next Blanking Period.
All counters share a single reset line for X/Y wrap, so they are always in sync.
A schematic will show this when i have time to make one up.
So here is what I am starting (again) with...
Getting ready to insert the Dual Buffer Memory into the design.Notice that I now require four 512K 10ns SRAM chips for the VGA Generator.
Since 1024 x 480 x 2 x 2 requires 1,966,080 bytes, I need 2 megs of RAM for dual buffers.
Explanation of 1024 x 480 x 2 x 2...
Since the X/Y counters are bit based, to count to 640, that requires 10 bits, which is actually 1024 bytes.
So the SRAM is setup as 10 bits for X and 9 bits for Y.
Because I am now sending 12 bit color with 4 special bits, I need double the SRAM for a 16 bit data bus.
I plan to connect this all up and then stuff a 640 x 480 image with 4096 colors into the Memory using an AVR for testing.
If the image is clean and stable, I will proceed with the rest of the design.
This is really going to push the realm of the breadboards to a new level if it works.
The "slowest" signal that will be used will be 25.175Mhz in this design!
Photos and a video of the first image test coming soon.
Cheers,
Radical Brad