Good discussions about overclocking!

I tried the JMP instruction that wrap around 64K boundary. the W65C02 works at 33MHz but failed to execute correctly at 34.5MHz. Screen capture shows when it is operating properly.

I'm driving the W65C02 directly with the output of the can oscillator. I'll try buffer the oscillator output with the CPLD and drive W65C02 with output of CPLD which has faster rise time.
Bill



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Edit:
By buffering oscillator output with CPLD, I'm able to run W65C02 at 36MHz, but I noticed it will crash when voltage is lowered to 4.6V, so it is nearing the edge at 36MHz. By raising voltage above 5.3V, I can run successfully at 40MHz, but that's definitely outside of the commercial operating voltage. All tests are done at room temperature.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

On paper EPM7000 has TTL level output, but its output drive VI chart shows it drives to 3.75V. Scope measurement shows it drives to 4V, hard, at room temperature. Probably too fast, so 100 ohm serial source terminating resistor is a good idea.
Bill

Edit, attached graph is from EPM7000 datasheet

I tried the resistor thing the other day when I was experimenting, as the ACT’s certainly do have apparent ringing, when compared to LS and even HC. But I couldn’t get rid of the ringing at all. The 100 ohm resistor only either pulled up the voltage or pulled it down, depending on connecting to 5V or ground. I connected it right at the output pin, tried it at the other end, and even on both ends at the same time. Just couldn’t reduce the ringing at all.

Oh and it was asked earlier where I’m from. Aussie here! That will account for the time difference. You guys are in the wrong time zone!

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Ah, series! That was about the only thing I didn’t try. Thanks for the clarification.

In this case I’m mainly playing around and experimenting, seeing what works best. I will certainly plan on doing a much better layout in the future though.

Summer growing season is about done. I have 50 gallons of wines fermenting away in the garage; dahlias still in the field waiting for the killing frost so I can dig them up. Sent off a few pc boards to JLCPCB; next I'm returning to the W65C816 overclock experiment. First thing is checking W65C02 still work at 40MHz where I left it, it does. Removing W65C02 and replacing it with W65C816 (Mouser W65C816S6TPG-14) and it still work at 40MHz like nothing changed but power consumption is 15mA higher. Verify E pin is high so W65C816 is in emulation mode after reset as it should.

Hmm, so 0.6u W65C816 can run to 40MHz, at least in the emulation mode. Like W65C02, I found it necessary to raise voltage to 5.2V to have reliable operation with my simple test program which means 40MHz is right at the frequency limit.

Now I need to read the manual to figure out how to run it in native mode...

*******Update*****

Never imagine it would be XCE instruction to switch between emulation and native modes! So here is a modified ROMtest program that prints 256 bytes to console in emulation mode including wrapping around 64K memory boundary and then switches mode to native mode and prints 256 bytes to console and then switches back to emulation mode and repeat.



Attached picture is screen capture of the program running at 40MHz @5.3V It appears to run successfully alternating between emulation and native modes. Examine the 'E' output of 65816 I see it toggles between high and low every 22.8mS. Since the serial baud is derived by 40MHz/22 effectively 113600N81 (98.6% of standard baud of 115200), it takes about 22.5mS to transmit 256 bytes, so that's about right.

I think W65C816 CAN run to 40MHz.


Bill

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

50 gallons make 250 bottles, just enough for a nice Christmas party. Many of my cousins are deficient in aldehyde dehydrogenase (ALDH2) so they can have continuous bender all winter long with just one bottle of wine. Apparently I don't have that genetic deficiency.

I'm limited by the oscillators I have on hand, the next lower frequency I have is 36MHz. W65C816 will run down to 4.5V (the trip voltage of reset supervisor) with 36MHz oscillator. The current consumption of oscillator, CPLD, and W65C816 at 5V 36MHz is 214mA. By comparison, the current consumption is 151mA at 5V, 7.37MHz clock. Some of that current difference may be due to different oscillators, however.
Bill

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Did you take a moment to do the math, Garth? Contention will certainly increase current draw, but Bill's figures don't clearly imply contention. When he boosted the clock frequency to 488% (36/7.37 MHz) the current consumption only increased to 142% (214/151 mA).

If there are blasts of contention I'd expect the current drain from that to scale with frequency. Bill's rig may indeed suffer an increase due to contention, but if so it's obscured by other, much larger current drains which vary only slightly, or not at all, according to clock rate. The CPLD is an obvious suspect, along with the oscillator and probably RAM, too.

ETA: in case anyone's wondering, the 42% increase can be largely or entirely explained by the normal and inevitable charging and discharging of capacitive loads in the circuit, including the internal logic of the '816. (The resultant current drain scales with frequency.)

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I, too, am curious about this.

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Garth,
While a bare minimum W65C816 seems to run stable to 36MHz or even 40MHz, in one example of real world hardware with banked RAM, CF storage and expansion bus, it appears to peak out around 25MHz. This real world hardware is revised CRC65that accommodates both W65C02 and W65C816. When in W65C816 mode it can access the 2nd half of 128K RAM via a bank latch implemented in CPLD. It is still a very simple design but does have more components than the simple overclocking test bed. Perhaps the added loads or perhaps the contention that your post referring to resulted in much lower peak clock. I have not investigated further into the causes.
Bill