The 6502 in Logisim successfully passes the BRK sequence and executes the first few instructions. Some kind of problem with the JSR. We are working on it.
Nothing new Again there were problems with the bi-directional transistors used for SB/DB and SB/ADH commands. I had to do a little hack for the logisim, which does not support bidirectional connections, to account for the "dirty" buses.
@org, I am a college teacher at a Philippine university and I would like to assign as an undergraduate student project the task of converting your Logisim design into a Digital design. (The Digital software is the one at https://github.com/hneemann/Digital.) It will be made very clear in the documentation and presentation that the Logisim design was made by you. Is this all right with you?
@org, my students downloaded the Logisim circuit currently available at github, and they're getting errors when they run the Logisim circuit. The 6502 circuit has wires that are "red" and in error (SB OUT, DB OUT, etc.). Has this been fixed?
Yes, the 6502.circ works well.
Maybe they downloaded the "Evo" version (for Logisim Evolution), which may still contain bugs since it hasn't been updated in a while.
I get it. You are looking at the state after the very first half cycle (PHI1), during which 6502's behavior is Undefined.
This is due to the fact that the command latches for the lower part are only updated during PHI2, so on the first half-cycle of PHI1 the lower part "goes crazy", as almost all latches issue down all commands at once.
It is enough to perform one more half-cycle and the processor stabilizes.
