56k address decoding logic
Re: 56k address decoding logic
Have you separately confirmed that the IO space works? It seems to me that your 55/AA /FE test with ram doesn't exclude the possibility that IO could be flaky (too). I mean it's technically possible just from that test that IO is a problem.
I guess I would try this ram chip in the previous project, or in some different memory map that doesn't use the 688, and see if that works. But you know, it may just be a bad breadboard connection.
I guess I would try this ram chip in the previous project, or in some different memory map that doesn't use the 688, and see if that works. But you know, it may just be a bad breadboard connection.
Re: 56k address decoding logic
Dr Jefyll wrote:
We're not gonna judge your project in terms of a beauty contest -- this is about functionality. We've doled out advice to project builders before, and it's by no means uncommon that a photo will reveal crucial details which the builder overlooked or considered unimportant.
Dr Jefyll wrote:
technifix the n00b wrote:
Upon power up I get $FF's for the first two (the $FE is just to show me I'm still in the loop), but after about 10 seconds it starts working, and it works for about 5-10 seconds and then I see $00's along with the $FE.
- after powerup the LEDs show $FF (delay), $FF (delay), $FE (delay) in a repeating a pattern
- after about 10 s, the LEDs show $55 (delay), $AA (delay), $FE (delay) in a repeating a pattern
- after another 5-10 s, the LEDs show $00 (delay), $00 (delay), $FE (delay) in a repeating a pattern
Dr Jefyll wrote:
OK, you believe it's a timing issue. But remember to allow for the interpretations of others. Otherwise, why bother to post your problem here!
Dr Jefyll wrote:
ps- I'm in Canada, too, and have always found Digikey's shipping much cheaper ($8, as opposed to $20 from Mouser and others).
Steve
Re: 56k address decoding logic
1024MAK wrote:
Can I just point out that some members here have difficulty reading coloured schematics. It would be appreciated if you can either post black and white diagrams, or provide both.
Also that there is normally no problem with 74HCxxx driving 74HCTxxx. And there is no problem with 74HCTxxx driving 74HCxxx, as both have the same type of output stages.
Mark
Also that there is normally no problem with 74HCxxx driving 74HCTxxx. And there is no problem with 74HCTxxx driving 74HCxxx, as both have the same type of output stages.
Mark
I read somewhere that both HCT and ACT are more susceptible to noise, and that's why I am going to snag a few HC/AC replacements.
Steve
Re: 56k address decoding logic
GeorgeHug wrote:
Have you separately confirmed that the IO space works? It seems to me that your 55/AA /FE test with ram doesn't exclude the possibility that IO could be flaky (too). I mean it's technically possible just from that test that IO is a problem.
GeorgeHug wrote:
I guess I would try this ram chip in the previous project, or in some different memory map that doesn't use the 688, and see if that works. But you know, it may just be a bad breadboard connection.
Steve
Re: 56k address decoding logic
It's alive! There must've been either a bad connection or a crossed connection. It works now. I'm running my LED loop test except I changed it to store the $55 value to $C000 and $AA to $7000 so as to test each side of the 32k threshold. It's been running for about 5 minutes without issue now. I've uploaded some pictures. I have a shipment from Mouser that should come in this week. It has some 74AC10s in it which should allow me to do away with the inverter.. but I don't know if I want to have more than one 6522 which would necessitate keeping the 74AC11 so I can share the IRQ line with everything.
I also found that I left one gate on the inverter floating.. perhaps that was the issue.
Thanks!
Steve
I also found that I left one gate on the inverter floating.. perhaps that was the issue.
Thanks!
Steve
Re: 56k address decoding logic
Way to go, Steve. Congrats'...
Re: 56k address decoding logic
akohlbecker wrote:
Cool idea to use a comparator to decode the I/O prefix, I didn't see that one before.
Cheerful regards, Mike
Re: 56k address decoding logic
Hello again all!
I've made some changes that someone may find interesting. Slightly. Well, not really.
This new logic will allow you to place the IO page anywhere on the map. I've tested it at $FE00 and $0000 and it works. I wonder if there's an application where having IO on zero page would be useful. Perhaps if you were controlling something where every clock counted.. but I suppose the 6502 may not be the best solution in that circumstance.
I did get some 74AC10's and replacing the '11 and removing the inverter worked fine, but you couldn't place IO in ROM space with that setup.
Anyway, I am running into another odd problem. The computer works well for around 10 minutes. After that it crashes. At first I thought it was some dodgy wiring (it may still be) but I can cycle the power without touching the wires and it restarts without issue, and then crashes. My main thoughts are poor wiring (wires too long, perhaps some interference, dodgy connections perhaps) or flaky RAM chips (I got them from Ebay.) Can anyone think of other reasons I may be able to test for or check out?
Cheers!
Steve
I've made some changes that someone may find interesting. Slightly. Well, not really.
This new logic will allow you to place the IO page anywhere on the map. I've tested it at $FE00 and $0000 and it works. I wonder if there's an application where having IO on zero page would be useful. Perhaps if you were controlling something where every clock counted.. but I suppose the 6502 may not be the best solution in that circumstance.
I did get some 74AC10's and replacing the '11 and removing the inverter worked fine, but you couldn't place IO in ROM space with that setup.
Anyway, I am running into another odd problem. The computer works well for around 10 minutes. After that it crashes. At first I thought it was some dodgy wiring (it may still be) but I can cycle the power without touching the wires and it restarts without issue, and then crashes. My main thoughts are poor wiring (wires too long, perhaps some interference, dodgy connections perhaps) or flaky RAM chips (I got them from Ebay.) Can anyone think of other reasons I may be able to test for or check out?
Cheers!
Steve
Re: 56k address decoding logic
technifix wrote:
The computer works well for around 10 minutes. After that it crashes.
Quote:
I wonder if there's an application where having IO on zero page would be useful.
In my own case, speedy IO is a high priority, and I had no hesitation in devoting a portion of zero page to IO. The speedup is non-trivial -- partly because all loads and stores happen one cycle quicker, but also because of being able to exploit the very efficient 'C02 bit manipulation instructions: SMB / RMB (set/reset memory bit) and BBS / BBR (branch on bit set/reset).
However, many 65xx fans are obliged to support legacy BIOSes that make zero page largely unavailable. In those circumstances you wouldn't put IO in zero page unless you were absolutely desperate for the fastest possible IO.
BTW, the reason my own computers have oodles of zero page space available is this. Except for IO, almost all my use of zero page (including BIOS-like routines) takes advantage of a stack located there. This makes allocation and deallocation of the precious space automatic, and I never experience crowding.
-- Jeff
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html
https://laughtonelectronics.com/Arcana/ ... mmary.html
Re: 56k address decoding logic
I suppose if a fridge or freezer starts up somewhere that could give a power supply a bit of a wobble...
Re: 56k address decoding logic
Dr Jefyll wrote:
technifix wrote:
The computer works well for around 10 minutes. After that it crashes.
technifix wrote:
I wonder if there's an application where having IO on zero page would be useful.
In todays applications? Personally, I'd suggest we're doing it wrong, but back in the 2600 days it was all they had - for the money people were prepared to pay for it...
-Gordon
--
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/
Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/
Re: 56k address decoding logic
technifix wrote:
Hello again all!
Anyway, I am running into another odd problem. The computer works well for around 10 minutes. After that it crashes. At first I thought it was some dodgy wiring (it may still be) but I can cycle the power without touching the wires and it restarts without issue, and then crashes. My main thoughts are poor wiring (wires too long, perhaps some interference, dodgy connections perhaps) or flaky RAM chips (I got them from Ebay.) Can anyone think of other reasons I may be able to test for or check out?
Cheers!
Steve
Anyway, I am running into another odd problem. The computer works well for around 10 minutes. After that it crashes. At first I thought it was some dodgy wiring (it may still be) but I can cycle the power without touching the wires and it restarts without issue, and then crashes. My main thoughts are poor wiring (wires too long, perhaps some interference, dodgy connections perhaps) or flaky RAM chips (I got them from Ebay.) Can anyone think of other reasons I may be able to test for or check out?
Cheers!
Steve
Also press/wiggle/flex your board for possible intermittent connections.
Bill
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Re: 56k address decoding logic
technifix wrote:
I wonder if there's an application where having IO on zero page would be useful. Perhaps if you were controlling something where every clock counted
Dr Jefyll wrote:
BTW, the reason my own computers have oodles of zero page space available is this: Except for IO, almost all my use of zero page (including BIOS-like routines) takes advantage of a [data] stack located there. This makes allocation and deallocation of the precious space automatic, and I never experience crowding.
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
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Re: 56k address decoding logic
technifix wrote:
I wonder if there's an application where having IO on zero page would be useful.
I question the value of mapping I/O hardware to zero (direct) page.
In typical I/O primitives—of which I have written many—a relatively small amount of the total processing time is consumed in instructions that touch the I/O device itself. Gaining a one-clock-cycle advantage is of dubious value unless a single primitive call entails many repeated accesses to the I/O device in question. More often than not, the speed (or lack thereof) of the I/O device itself is the dominate performance factor, not the code.
The other consideration with use of zero page in this fashion is you may need that space for buffer pointers and other operating environment variables. Plus if you have a language interpreter running, it too will need zero page space, potentially a lot of it. Mapping your entire I/O area into this valuable piece of 6502 real estate is not wise, in my opinion.
So I would think long and hard before using zero page for hardware.
x86? We ain't got no x86. We don't NEED no stinking x86!
Re: 56k address decoding logic
I've been experimenting trying to find the source of the crashing. There were some interesting developments.
I was running the SBC at 6MHz, and it would crash around the 10 minute mark. I switched to a 1MHz can and it crashed after an hour. Of course I thought this meant perhaps there was some bug in my program that would only manifest after however many clock cycles that would be, but I put in an 8MHz can and it ran for about 4 hours before it crashed. Must be a co-incidence.
I redid the layout for the board. Every chip moved, I also made my 8 LED IO device out of a 74HC574 latch and some glue logic (using the third gate of my 3-input AND gate - no wastage here! It used to be just manipulating pins on the 6522) and modified the code to suit, and the problem still happens the same way, which although not completely ruling out bad connections does seem to make it less likely. Also just placing my hand down on all of the wiring while it runs does nothing.
I noticed that after a crash the current usage would go up by about 100mA. The LCD also would act funny. I also noticed that the LCD would act funny on some resets in general. I've used this LCD for over a year without issue, I'm going to test it in one of my other boards.
I wanted to see if the RAM chips I'm using may be the culprit so I re-wrote my LED code to eliminate the LCD code and all JSRs. It's now all inline with no RAM usage. Crash still happens.
On a lark I just pulled out the LCD. Board ran for 6 hours with no issues. Remember, there is no code driving it now, it's just in the circuit connected to the 6522 but I don't make any usage of the 6522 at all. I put in a 10MHz can, and it's been running now for a couple of hours. 10MHz has never worked before.
So it looks like the LCD is causing some sort of issue. It's a 1604 display, and like I said I've been using it for over a year. I have a 2004 display in my second SBC which I'm going to swap in probably tomorrow because of Christmas engagements but I'm kind of wondering why it would cause issues now.
The things you learn when you just mess around with stuff because the code is so simple it has to work. Oh, I also modified the code to add an stz $A000 just to add a RAM access and it doesn't seem to be a problem.
What a ride.
Have a merry whatever you celebrate!
Steve
I was running the SBC at 6MHz, and it would crash around the 10 minute mark. I switched to a 1MHz can and it crashed after an hour. Of course I thought this meant perhaps there was some bug in my program that would only manifest after however many clock cycles that would be, but I put in an 8MHz can and it ran for about 4 hours before it crashed. Must be a co-incidence.
I redid the layout for the board. Every chip moved, I also made my 8 LED IO device out of a 74HC574 latch and some glue logic (using the third gate of my 3-input AND gate - no wastage here! It used to be just manipulating pins on the 6522) and modified the code to suit, and the problem still happens the same way, which although not completely ruling out bad connections does seem to make it less likely. Also just placing my hand down on all of the wiring while it runs does nothing.
I noticed that after a crash the current usage would go up by about 100mA. The LCD also would act funny. I also noticed that the LCD would act funny on some resets in general. I've used this LCD for over a year without issue, I'm going to test it in one of my other boards.
I wanted to see if the RAM chips I'm using may be the culprit so I re-wrote my LED code to eliminate the LCD code and all JSRs. It's now all inline with no RAM usage. Crash still happens.
On a lark I just pulled out the LCD. Board ran for 6 hours with no issues. Remember, there is no code driving it now, it's just in the circuit connected to the 6522 but I don't make any usage of the 6522 at all. I put in a 10MHz can, and it's been running now for a couple of hours. 10MHz has never worked before.
So it looks like the LCD is causing some sort of issue. It's a 1604 display, and like I said I've been using it for over a year. I have a 2004 display in my second SBC which I'm going to swap in probably tomorrow because of Christmas engagements but I'm kind of wondering why it would cause issues now.
The things you learn when you just mess around with stuff because the code is so simple it has to work. Oh, I also modified the code to add an stz $A000 just to add a RAM access and it doesn't seem to be a problem.
What a ride.
Have a merry whatever you celebrate!
Steve