Hello,

I'm working on a work-alike build of an Acorn System 1, which had an NMOS 6502 running at 1MHz. I've got a fistfull of Rockwell 6502s to hand, but the 1MHz crystal was a bit more bother. It seems they only exist in the big HC-51 package, which is too big for my board, so I'm planning on using an 8-pin DIP oscillator instead.

Attached is an extract of the System 1's circuit diagram:


(As can be seen, the System 1 supported using a capacitor instead of a crystal for industrial applications where timing was not critical.)

I'll be connecting the DIP oscillator directly to Phi0in, and removing the resistor and crystal/capacitor. That'll leave me with Phi2out passing through a pair of inverters on its way to fee the rest of the board. Are the inverters needed? The only benefit I can foresee is that using the 74LS04 to drive the board's clock may be preferable to using the 6502, and that there are two extra gate delays on the Phi2 clock. If these weren't needed, why wouldn't the designers have taken Phi2 direct from the 6502 and foregone the second inverter? Or would this mean the other devices connected to Phi2 would affect the crystal's timing?

Looking at Garth Wilson's primer on clock generation, he suggests a different crystal-based circuit, where Phi2 goes directly to the board, and isn't used in the clock generation. (This is the style of circuit used by Acorn in their later BBC Microcomputer.) This suggests that the double-inversion isn't needed in my case.

If the two inverters are no longer necessary, I may repurpose them for something else.

I do find that confusing! You could regard the board's "phi2" clock as being a twice-delayed phi2(out), or you could regard it as an inverted phi0. Which, right now, makes little sense to me! I look forward to being enlightened.

The issue 3 circuit diagram here does retain the pair of inverters from the Phi2 output.

(Atomic Theory and Practice doesn't have this level of detail, it seems.)

Leave them in. Why?
1) Depending on how many recipients require PHI2 the CPUs output may be too weak.
2) The circuit has worked in its original form, that means the overall timing was OK. If you now change that timing it may cause trouble.
3) If you got everything working fine you may try to omit these two inverters and check whether it still works flawlessly.


Regards

An interesting find: I hadn't looked at the Acorn Atom's clock.

The Atom is of course, based on the System 2, which is itself pretty much a System 1 in a eurocard rack with a video card on the bus. Looking at the Atom's system diagram, it has a 4MHz crystal (in Garth's arrangement) being divided by 4 in a 74LS393, which is then fed in to the 6502's PhiIn, but it still has the pair of inverters on the Phi2out. It suggests that they are indeed needed, but why?

The System 5 used a 6502A on a revised CPU card. It runs on a 24MHz crystal, and generates 12,8,6,4,3,2 and 1MHz clocks on the eurocard bus for various expansion cards. It inputs its (divided) 2MHz clock signal into the 6502A, and then buffers Phi2out with a 74LS125. (See page 62 of http://www.vintageacorn.com/Acorn_System5Handbook.pdf) Use of a buffer chip suggests it's for bus powering reasons, but equally the circuit seems to have had only one spare inverter gate, so maybe it was a change of convenience? (The gate delay on a '125 is roughly twice that of a '04, which would fit the timing theory.)

Looking again at the BBC Micro, while its Phi2 output isn't buffered in any way, the R/W` output is inverted twice: once to generate R`/W, and again to generate the R/W` signal that is actually shared with the rest of the system. And Phi2out isn't actually used by anything: Phi1out is inverted once and shared with the board as a "2MHZE" CPU-synchronised signal. Phi1 is fed to two 74xx ICs (that I can spot), whereas the 2MHZE signal feeds two 6522s, a 68B54, a serial port ULA, a few 74xx ICs, AND is left hanging off the bus of the "tube" expansion port.

On balance, I'm leaning towards saying that the pair of inverters are there to buffer the 6502's signal, rather for timing reasons. I'd appreciate any further insight from those more knowledgeable.



I'm at a point in construction where I had to decide on one option or the other: changing my mind later would mean desoldering chips and rearranging things. Without advice to the contrary, I'd probably have opted to keep the double inverter just in case. I am now gonig to leave them in; seeing the Atom use it in my (kind of) situation reassures me that it is needed, but I'm still not certain of the reason why.

Ahem, yes, sorry, I had confusion there between Atom and System - which turned out not to be too big a problem as they are related (as you point out.)

We've had some recent debugging discussions where people had problems with clock skew, or with stray writes due to glue delays. It's certainly worth trying to understand why a delay might be useful (or essential, or problematic.) If the CPU's clock is ahead of the rest of the system, because the system gets a buffered clock, you might expect possible hold-time problems when the CPU writes. Perhaps that's a non-problem as the undriven bus will retain the values for a bit. On the other hand, you'd avoid hold-time problems when the CPU reads. You wouldn't want the RnW signal to be advanced, if there's a possibility of converting a read to a write. Probably pictures would help here a lot more than words!

Wasn't the Atom based on the System 3?

_________________
Cat; the other white meat.

That's my feeling as well. In your own project, how many loads, and of what type (ie, MOS vs TTL vs LS-TTL), would be driven by that second inverter?

It's possible both explanations (timing and buffering) are inapplicable. Trying to guess what people were thinking is a dodgy proposition at best. With the Acorn, could certain features have been inherited from a previous design? Or perhaps the designer was being overly cautious, or simply had a brain fart. Or, perhaps there was a PCB layout issue. It might've been easier to route the signal through an extra inverter (at no extra cost, assuming that inverter was otherwise unused). Here (below) is a setup you might consider. I suppose if the jumper were 3-way then you'd have the double-inverter option, too.

To discuss clock skew I've created a new thread.

BTW- welcome, kazzie!

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Oh yes - welcome!

I had it in my mind that the System 3 was 6809-based when I wrote that, based on this example, but it was in fact sold with a 6502, with the 6809 CPU card and it's Flex OS offered as an option.

Wikipedia's page on the System line is a little unclear, saying both that the "Atom has been called a cut-down version of the System 3", and that "The System 2 keyboard design also served as the case for the Acorn Atom" When considering the following specifications:

• System 2: Rack-based computer with 6502 processor, 4K RAM, 4K Basic and Cassette OS
• System 3: Rack-based computer with 6502 or 6809 processor, 8K RAM, 4K Basic and floppy disk DOS, controller & drive
• Atom: All-in-one computer with 6502 processor, 2K RAM, 8K Basic and Cassette OS

I think the Atom sounds more like a System 2 than a System 3, given it was based on cassette storage. The System 3's 6809 option seems to have been a dead end, as the System 4 and 5 went back to the 6502 (and 6502A) instead.

Either way, with a modular, card-based layout you could take all the bits out of a System 3 one at a time and replace them with the innards of a System 2, and it'd still work the same!

Picking Dr. Jefylls idea of a jumper and replacing the two LS04 inverters using noninverting gates (like LS11 e.g.) a 4-way jumper could give you 4 possible timings to choose from. And three of them can osc, gate 1, and gate 2 should manage the load as they are equal or more powerful than the LS04.

Hi, having had a good night's sleep and a proper read of what you've posted, let me get back to you now:

In my project that second inverter will be driving two LS00 gates (to generate NRDS and NWDS signals) and a 4024B (cassette circuitry). In the original, the inverter's output was also left hanging off the bus for other expansion cards (which could connect it to a 6854, an LS13, an LS139, and a 6522 or two in a well-expanded configuration).


The System 1 was based on a prototype that was practically the same machine (but missing the cassette circuitry). The prototype was built on a verowire/roadrunner system, so signal routing wouldn't have been an issue for it. It used three of the four same ICs for glue logic as the commercial version (LS00, LS04, LS139, but not LS20) but I don't know exactly how they differed: the double inversion may or may not have been there. The commercial version uses every gate available on the glue ICs as is, but who knows what design choices they made to get there.

Having cross-referenced the circuit diagram and photographs of the System 1's board, I can't see that taking a clock signal from pin 11 of the LS04 would be any harder than taking it from pin 8 (after the double inversion), given where the signal is fed to.

That leaves caution (for buffering or timing) and also brain fart as possible explanations. Looking again at the Atom (which followed on from the System) and not only does it maintain the double-inversion of Phi2 when it isn't needed for the clock circuit, but it also has a similar double inversion on the reset circuit:

RST goes only to the 8255, whereas NRST is fed to the 6502 and the expansion port. It seems that this may have been a design decision to buffer these lines as they went to the expansion bus, though on the Atom Phi2 and NRST are buffered but not R/NW, and on the System Phi2, NRDS and NWDS are buffered, but not NRST.

That diagram (and GaBuZoMeu's additions) look interesting. As my LS04 will be socketed, I may connect the socket to a breakout board and experiment with the timing once the board is built.

Thanks also (all) for the welcomes. Having spent months lurking here it feels a bit odd, as I already feel part of the community (if a rather mute one).

The case of reset is rather more solid: to get reliable reset you need a good edge, so the RC circuit alone can't do that. So that explains one logic gate. And then, if you have chips which need a positive-sense reset, and others which need the opposite, you need an inverter, which justifies a second gate.

It might well be true also for the clock out of the 6502, that it hasn't a lot of drive strength, and for sure you need clean clock signals elsewhere.

It might even be that two inverters on the clock is a minimum, and the clever thing was to use one of them as part of the oscillator...

Thanks for the clarification on the Atom's reset. (The System is cheeky enough to not even use an RC circuit: it's just a pull-up resistor and a switch.)

Looking at the 6502 data sheets over in the documents section, the MOS/Commodore 1976 version gives three different example clock circuits (series crystal, parallel crystal and RC) which are similar the System 1's layout: bridging Phi0in and Phi2out, with an extra inverter to give the system clock. By comparison, the Rockwell 1987 version gives the same clock circuit as Garth, with two inverters on the Phi0in size and the Phi2out completely independent.

Acorn were using MOS chips (the prototype was built with a white ceramic MOS 6502) so it seems very likely that they worked from the datasheet's circuit for their prototype and System boards. For the Atom they may then have left the double inverter in "just in case".

I wonder why Rockwell would have suggested a different circuit: did they make any changes to their NMOS 6502 design?

EDIT: Adding pictures

First, just to say, I've been lurking here for far too long I'll try to make an effort to post more often... So hello to those who don't know me from other forums.

Yeah, but if the input does not require much current, and the resistor value is high, the circuit boards parasitic capacitance (stray capacitance) can be enough. Myself, I prefer the certainty that including a real capacitor brings . Atoms often require the reset key to be pressed after power-on. The purpose of the capacitor can be: debounce the reset switch, or provide a power-on reset, or both.

As to the Phi2 clock, many microprocessor manufacturers strongly recommended that ALL outputs from the microprocessor should be buffered. Although the 74xx04 does not have "buffer" type outputs, in terms of cost, if some of the gates were already required elsewhere, it's cheaper and easier to use it to buffer the Phi2 clock (than adding a extra chip). Buffering is especially important for signals that control critical functions where the signal is routed all over the place, or where it goes off board to any kind of bus. Long signal lines degrade the edges, buffering provides extra drive current and maybe faster edges, which helps a lot with the signal integrity.

Having come up with a design (that works), you will often find that same design in later versions and later machines. Even if some features may no longer be needed. As most people/companies don't feel the need to reinvent the wheel.

And finally, if a manufacturer shows a suggested design in a data sheet, the safest way, is to use the same design (or a close variation of it) in the design of the device that you are making.

Crystal oscillators using logic gates back then, was one of those areas of electronics that was known in some circles as a "black art" (hard to understand, so left to the people who were 'good' at it). So data sheet designs would often be copied.

Mark

Greetings, Mark! I wonder if that's a record, of 3 years from registration to posting. Possibly not!

On the subject of suggested crystal oscillator circuit, indeed, they can be difficult to make robust. Possibly Rockwell chose to simplify and chose the best one for the components of the day. As logic families evolved, different tactics might come into play. See for example the discussion here.