Dan's 6502 build, aka, The WOPR Jr.

[Dr Jefyll]

BigDumbDinosaur wrote:

If you are going to do this you might want to consider the use of bus drivers to strengthen the signals, 74AC541 for the address bus (two required) and 74AC245 for the data bus.

If large boards and long traces are involved then I agree it might be better if you don't connect the CPU directly to the external bus. But AHC family chips (74AHC245 and 74AHC541 in this case) are a better choice than AC family chips (74AC245 and 74AC541). The latter have very abrupt output transitions which for non-expert designers can result in signal integrity problems (ringing).

('AHC and 'AHCT series chips deserve more attention on this forum, IMO. They're much faster than HC/HCT yet they're more forgiving than AC/ACT. And availability is moderately good. Regarding the 'AHC245 and 'AHC541, I notice Digikey stocks these both in through-hole and surface-mount.)

Another option is to not use bus drivers. You could either install a low-value (~50 ohm) resistor in series with each bus line (space-saving resistor arrays are available in DIP and SOIC packages) or just connect the CPU directly to the external bus. Just make sure the boards are fairly compact, and be sure to heed Garth's advice about interspersing ground and bypassed-Vcc pins among the signal pins on the connector.

Good luck, and keep us posted!

-- Jeff

[Dan Moos]

I currently have one 6522 in my build, and don't use its IRQ line. My UART is the only thing hooked to the CPU's IRQ pin.

As I design the PCB, I realize I will want to have that VIA's IRQ available, plus the ability to add more chips with access to the IRQ pin on the CPU.

My current plan is to use a 74HC08 quad AND. I will hook an 8 switch DIP to all the AND inputs. The other half of each switch will be connected to a 10k pull up to VCC. Any unused AND input can be held HIGH if the switch is set. The IRQs from each VIA, ACIA, ect. will each go to an AND input. So the ANDs that actually have signals leading to them can either be held HIGH with the switch, or controlled by the associated chip. This way, its configurable based on what is actually in the hardware, or my desire to disable interrupts for a particular chip with the flick of a switch.

Question 1: Is this a good way to do this?

Question 2: Lets say I have the switch closed on an AND input that has a chip's IRQ pin on it. With my proposed setup, there shouldn't be any conflicts if an interrupt occurs. My 10k pullups should be fine?

EDIT:

Do I need individual pullups, or can I use one resistor for connected to all the switches? Since its CMOS, there will be hardly any current even if all the switchs are closed. right?

[GARTHWILSON]

I would leave out the DIP switch and just put a pull-up resistor on every line. Then it will work whether it's left open, or connected to a wire-or IRQ\ output, or to a totem-pole IRQ\ output. Since most IRQ\ outputs will be high almost all the time anyway, the power waste of one pulling down against a possibly unnecessary pull-up resistor a tiny percentage of the time is is of no consequence.

[Dr Jefyll]

Yeah, the switch idea is kinda cool but not really necessary. Most peripheral IC's disable their interrupt output upon hardware reset. After that, software can enable and disable the various interrupt functions.

FWIW, you wouldn't need 8 switches (if I understand what you mean). If you have four peripheral devices then you'll only need four switches. The IRQ output of each device connects to one side of a switch. The other side of that switch connects to a pullup resistor and one of the AND inputs.

One AND section accepts two of the switch/resistor nodes and another AND section accepts two more. A third AND section combines the outputs of the first two sections.

Dan Moos wrote:

Question 2: Lets say I have the switch closed on an AND input that has a chip's IRQ pin on it. With my proposed setup, there shouldn't be any conflicts if an interrupt occurs. My 10k pullups should be fine?

10K is rather high. There's an RC delay you need to satisfy, explained about 1/4 way down this page on Garth's site. As for conflicts, remember the CPU has only one IRQ input, so if multiple devices have their interrupt sources enabled simultaneously then there are measures you'll need to take to keep a handle on things .

[Dan Moos]

I chose 8 switches because the 74HC08 has 4 ANDs, thus 8 available inputs for IRQ lines. Maybe I don't need 8, but figured nothing is lost by using them all, even if most are just held high and hooked to no chips. 8 seems like allot more than I would ever need for sure, but it just felt silly wasting gates.

Also, since many here worry about excessive propagation delay, I figured passing the output from one AND to the input of another would be seen as an unnecessarily slow design.

I realize I'll have to deal with multiple simultaneous interrupts in software.

What about my single pullup for the whole shebang idea?

Here is my proposed circuit.

IRQ 0 and 1 will go to the IRQ pin on my existing ACIA and VIA respectively. The rest will go to a connector for expansion. This build is just an expandable prototype, so I want the ability to add things that will be integral in the final version

[GARTHWILSON]

You'd want separate resistors. Without them, the way you show it, if you connect two or more IRQ\ outputs and one or more has a totem-pole output, there will be a fight when one tries to go down while a totem-pole one tries to keep the line high. The current will go through the DIP switches, with no resistor in the way to separate them.

[Dan Moos]

Yeah, that dawned on me as I started running through it in my mind.

Thanks!

If I do that, and use smaller resistors, am I otherwise good?

[Dan Moos]

Just finally noticed your suggestion to omit the DIP switches.

Makes sense, but I like the idea of being able to disable a chip's interrupt ability from hardware. I can think if a few cases where that would be useful, especially during development.


Side note. You guys sure come through quick when I have a question! I rarely get such swift, and useful responses on other forums, even though this one has a relatively small active group. I have like 4 Kicad questions sitting on the EEVBlog forum, and while I have no doubt I'll get help, it always takes awhile. Its like you guys are just waiting to spring into action!

[Dan Moos]

Here is the amended version, taking you guy's advice into account.

[Dan Moos]

Dang, just realized another goof. Pretty sure I can't just connect all the AND outputs like that. Probably why it was suggested I feed the outputs of two ANDs into the input of a third.

Means I'll have half as many IRQ lines, and a wasted gate.

Is that my best play?

[barrym95838]

The '09 is open collector, but I suspect that using OC logic in a time-critical area could potentially introduce a fresh set of challenges.

Mike B.

[BigDumbDinosaur]

Dan Moos wrote:

Here is the amended version, taking you guy's advice into account.

Screenshot (2).png

Why are you making it so complicated? A device with a totem-pole IRQ output, such as the W65C22S, can drive a wired-OR IRQ circuit through a Schottky diode. Why mess with a bunch of gates like that?

In any case, you can't wire the outputs of the gates together in that fashion. If one gate tries to drive /IRQ low while the others are driving /IRQ high something is going to get broken.

[GARTHWILSON]

How 'bout something like this. The 74HC30 gives you 8 inputs, if you can spare an inverter function somewhere (even like from a spare NAND in a '00):

Each individual input can still have several open-drain (or open-collector) IRQ\ outputs at once. They can also handle totem-pole IRQ\ outputs. It's just that if there's a totem-pole IRQ\ output on one of them, that one will need to be alone, not sharing the input with any others.

There's also the 74HC133 13-input NAND gate.

[Dan Moos]

I already realized in my haste I foolishly connected my outputs (as per my last post). We're past that. I'll sacrifice half the lines, and feed two gates into one, again, as mentioned earlier.

As for the S variant of the 6522, I don't have those on hand, nor any Schotky's. I do have some 74HC08s.

As for the complication of the switches, I already stated my desire for hardware control of whether a particular chip's IRQ line is online. I can think of a few reasons I'd like that capability.

This is going to be an intermediate prototype board, not the final computer. Thus, I want flexibility so that I can try things. An IRQ circuit that can handle pretty much any type of output stage, and is switchable fills that bill with very little hassle. The resistors and switch bank are trivial to include.

[Dan Moos]

Garth, I'll have to see if I have that chip. I don't NEED 8 lines, it was just a by-product of my initial wrong move of joining my outputs, and wanting to us all my gates. If I use that 7408 properly, I'm down to four gates, but as you said, only totem-pole output stages need their own line. I could put more than one ACIA on a single line. Anyway, 4 should be enough.

I also really want the switches, for previously mentioned reasons. Imagine thinking you had an interrupt related problem, and as you sat there, all you had to do was turn off that interrupt with a switch to test the theory (instead of going through the hassle of re-coding and re-writing a ROM on a hunch). Also, I can think of reasons to want to switch UARTs on the fly during development.

The switches would be unlikely to be in the final build. Think of them as a debugging tool. I've already had issues where they would have saved me time!

I will see if I have that 8 input NAND. It would be better. Heck, I'm ordering dip switches, so adding a logic chip or two is no big deal. I have an unused NAND on my address decoding 74HC00, so I already have the inverter.