Hi,

there a couple of things about the WDC 65c02 that really puzzle me. The PHI0 vs. PHI2 has already been discussed recently in this thread viewtopic.php?f=12&t=3349.
Another thing is that according to the datasheet, it is not TTL compatible. The DS states a high level input voltage of VDD*0.7, which at 5V is 3.5V (the same column also states VDD-0.4 which really makes me wonder which is true now). (see page 24)
Using our project as an example, all other chips on the CPU bus (except maybe a WDC 65c22) have high level output levels of 2.4-2.7V, so according to the WDC specs, it can't possibly work. But it does.
Also, WDC have this article on replacing NMOS 6502 or Rockwell 65c02 with a WDC 65c02 on their website: http://westerndesigncenter.com/wdc/AN-0 ... ements.cfm
But they are only talking about pinout differences there, no word about signal levels.

What's wrong here? Did I miss something?

/thomas

_________________
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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Bear in mind we're talking here about the input levels to the WDC part, from a 74 series driver. Maybe one of two things helps out
- those 74 series which actually have CMOS output stages will output much closer to the high rail.
- because 74 series inputs take a lot of current, the TTL outputs are normally pulled down by TTL loads, but if they drive only CMOS loads they will in fact reach higher output levels.

And also, possibly
- the WDC input stages are actually more tolerant of a somewhat low voltage for a nominally high input than the datasheet suggests.

I think this might be closest to the truth. But I feel dirty for using them out of spec.

I still feel dirty. But the more I keep thinking about this, the more I also feel that the signal levels in the datasheet should be linked to the clock frequency, just as the supply voltages are. Or am I completely off track now?

I would say that the acceptable input levels (for logic inputs) depend on the receiving logic gate's ability to distinguish zero or one. The gate will have a logic threshold, related to the relative strengths of its pullup and pulldown circuit. All that is not dependent on clock frequency, but does scale up and down according to the power supply voltage.

For a clock input, the problem is more subtle: the edges have to be fast enough that the internal drivers can reliably arrange for a non-overlapping pair of clocks, and the levels have to be high enough (for the on-chip clock rails) that the voltage drop through an NMOS-only pass transistor still allows a logic one to be detected by the following gate as a logic one. That drop could be about 1.5V, fixed by the properties of the semiconductor, and is the reason why clock levels are described as a delta to the power rail, not a ratio.

For the chip speed, what matters is the cumulative logic delay through some series of logic gates - the critical path. Logic delay is related to the time it takes to charge the capacitance of the wires and the receiving gates, so it relates to current and therefore to transistor drive. It happens that a higher voltage makes for faster logic, even though the capacitances have to be charged to a higher level.

Hope that helps. Corrections or clarifications welcome.

It's true the inputs of the WDC 'C02 are not TTL compatible. The simplest solution is, don't use TTL to drive the inputs of a WDC 'C02! You can still use the familiar 74__ series chips. Just be sure to select the CMOS versions, usually denoted by a 'C' in the part number (such as 74HC 74HCT 74AC 74ACT). IOW avoid 74LS (or, if you MUST use it, include a pullup resistor).

As for the data sheet, they've done a poor job lining up the rows, and perhaps that's causing some confusion. My take on Table 6-2 is that BE, D0-D7, RDY and SOB adhere to one set of specifications, and IRQB, NMIB, PHI2B and RESB adhere to another.

cheers,
Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Okay. So, if I happen to have stuff on the data bus that does not have CMOS-outputs (which I do), like an old NMOS TMS9929 for example or even non-CMOS SRAM, I should buffer D0-D7 through a 74HCT245 to be on the safe side. Is that correct?


Ah, thanks.. makes a lot more sense now.

Yes, correct. I presume the outputs of the stuff you mention are rated to meet TTL levels. And the "T" in 74HCT245 means it will accept those levels.

Adding that '245 is probably overkill, but I can understand if you prefer to do things "by the book." A lot depends on the nature of the doc that's available. With the TMS9929, for example, if you're lucky the doc will be explicit enough to assure you that the '245 is not necessary. It may well be the case, but the folks who wrote the doc may've omitted certain info, assuming the user would be connecting to more NMOS, or to TTL.

Pullup resistors are still an option, although you'd need eight of them.

BTW, most other 'C02 manufacturers do cite TTL levels as being acceptable on the inputs -- it used to be a big selling point. Nowadays it's much less important.

One situation still makes it attractive. In a mixed-voltage system, a CMOS device operating on 3V can directly drive the input of a device operating on 5V if the 5V device is specified to accept TTL levels. But if you needed to input a 3V signal into a WDC 'C02 running on 5V, a level converter would be necessary (assuming you're determined to meet spec).

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Would an alternative manufacturer (such as Rockwell) meet your needs? Although no longer in production, non-WDC 4 MHz C02's are readily available. Consult the sticky topic, 65xx parts sources.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Yes. Although this is a hobby project, we aim to comply with the specs. At least with the most important ones
We do have the one or another timing violation here and there, but the chips we use seem to be tolerant enough. But high/low threshold voltages.. sounds kinda really important to me.
Instead of going back to the drawing board and putting a 245 in, I might just check if adding pullups will do. I could just solder a resistor pack right underneath the board at the cpu socket.


Must be pretty much what WDC was thinking.

We used Rockwell 'C02s in the beginning, but we decided to go for WDC because they are available new and we wanted to be able to go > 4MHz at some point. Our CPU board even has jumpers to accomodate the pinout differences WDC<->all other.
But for now, it seems like we will stick to the Rockwell ones a bit more.

Yup. When you approach or violate the stated limits, it means your noise margin (tolerance to externally impinging transients) is degraded. Even a computer that's designed 100% to spec will fail if a big enough transient occurs, but bigger transients are presumably more rare. So less noise margin means more risk.

Sounds like a good option. First maybe you should test the WDC part without the pullup resistors. Then you go ahead and add the pullups in any case, but if the first test also worked then you have some extra peace of mind.

If everything on the data bus is MOS or CMOS (high impedance inputs), then there's no appreciable DC loading. That means the value of the pullups can be comfortably low. Unless power consumption is a concern, you could size the resistors simply based on whatever the weakest device on the bus is capable of driving.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Surprisingly, the WDC ones do work. But as I said, according to the specs, they're not supposed to, so they seem to work more by accident.
By checking the data lines with a scope, I see signal levels way beyond 3.5V, around 5V. So, yes, we happen to be within WDC spec after all, but not sure why, and not sure if that is always the case, with any device on the bus. So, I'd like to file this under "happy accident" and add pullups or an 245.
Or I'll just stick to Rockwell and save the WDC chips for some future project.


I'd go for 3.3k, since this is what the datasheet states for everything else that needs to be pulled up.

The data bus is bidirectional, so sometimes it'll be the WDC itself which drives it. That'd explain the 5V signal levels.

If you haven't already, you could try syncing the scope to reads of that NMOS device you mentioned. It's when that device is driving the bus (and the WDC is supposed to receive the data) that we might have a problem with adequate voltage levels.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html