Speed & EEPROMs

[BigDumbDinosaur]

cbscpe wrote:

You could use a dual-rate clock.

Jeff's solution (above) is more elegant, has a very low parts count and can be rigged up to only affect devices that need a wait-state. Otherwise, the system runs full speed ahead at all times.

Unlike the NMOS parts, the 65C02 (and 65C816) will respond to RDY during write cycles. So there's really no good reason to not use wait-states to accommodate slower devices.

[Dr Jefyll]

BigDumbDinosaur wrote:

it appears that you are gating the SRAM chip select with Ø2. That is generally not good practice. [...] It's better to select the SRAM (and ROM) as soon as a valid address appears on the bus, which is early during Ø2 low

Yes, absolutely. This is something I take for granted, and is implicit in the wait-state circuit I posted above. I confess I didn't examine Banedon's circuit until now. (Hmmm... there are two signals named /ROM select... )

[GARTHWILSON]

The real problem is ROM speeds though, which are at least five times as slow as SRAM speeds.

[banedon]

A minor side track: could you use one of these for SOJ devices? I.e. is the spacing the same with the pins as the SOJIC? Forgive my ignorance as I've never dealt with SOJ/SOJIC.
http://uk.mouser.com/ProductDetail/Arie ... mh6pEqc%3d

[Oneironaut]

The 10ns SOJ packages are easy to hand solder.
I have done this using 3 different moethods; adapter, ribbon wire to socket, and most recently, dead-bugged to socket.

Here is the part at Digikey...

http://www.digikey.com/product-search/e ... ageSize=25

Garth also has modules available.

Brad

[GARTHWILSON]

banedon wrote:

A minor side track: could you use one of these for SOJ devices? I.e. is the spacing the same with the pins as the SOJIC? Forgive my ignorance as I've never dealt with SOJ/SOJIC.
http://uk.mouser.com/ProductDetail/Arie ... mh6pEqc%3d

The one you linked to has .025" square posts, which are too fat to go into a normal IC socket. Aries and others do however have the appropriate adapters. This is what they look like:

I have a few with different numbers of pins here. The adapter usually costs a lot more than the IC, but it sure makes things easy.

[banedon]

Thanks guys.
I've already purchased 4x CY7C109D-10VXI and 3x CY7C199D-10VXI so just need to figure out if I can find adapters that are cheap enough to warrant not soldering them myself.

[Oneironaut]

http://www.mikronauts.com/proto/154-2/

Brad

[banedon]

Oneironaut wrote:

http://www.mikronauts.com/proto/154-2/

Brad

Nice find, Brad. Just got to figure out how you order them
There's also these:
http://www.ebay.co.uk/itm/New-10-PCS-SO ... 3a9479cfc5

[jac_goudsmit]

Did you look at Schmartboard.com for SMD-to-DIP converter boards?

===Jac

[Dr Jefyll]

Here's another mounting method for SOJ (below).

Also I've edited my previous post to include a circuit for two wait-states. Compared with no wait states, this results in roughly quintuple (5 times) the available memory access time. /CS is presumed to go low before the start of phase two, as already discussed.

cheers,
Jeff

double-wait-state generator.gif (4.32 KiB) Viewed 2625 times

[banedon]

Looking now .

Brad, how do you normally keep the IC in place? A dab of hot glue? Blutack? (:D)

[banedon]

Dr Jefyll wrote:

Here's another mounting method for SOJ (below).

Also I've edited my previous post to include a circuit for two wait-states. Compared with no wait states, this results in roughly quintuple (5 times) the available memory access time. /CS is presumed to go low before the start of phase two, as already discussed.

cheers,
Jeff

double-wait-state generator.gif

J-lead mounting to WW pins.jpg

J-lead mounting to WW pins btm view.jpg

Hmmm this is quite interesting. For my next design I'm planning to use bank swapping which has the ability to specify the FROM bank and the TO bank separately when specifying READ and WRITE operations (basically for code copying).
Thus I could set up the following:

$0000-$1FFF - non-swap RAM area for ZP, stack and user/program space (area always stays available)
$2000-$7FFF - swap bank area A (RAM banks A0,A1,A2,A3)
$8000-$AFFF - non-swap I/O area (area always stays available)
$B000-$FFFF - swap bank area B (banks B0, B1)

B0 will be ROM
B1 will be faster RAM

On boot, B0 is selected. It copies boot strap code to page 0
This code runs a copy of bank B0 to B1, swaps to bank B1
Code is then executed from a point in the new 'rom' area in B1

Looks do-able to me.

[Oneironaut]

Once you solder the 4 bent legs, the IC is pretty well affixed since it seats nice in the socket.
Here is a closeup of the operation...

viewtopic.php?f=4&t=3329

Brad

banedon wrote:

Looking now .

Brad, how do you normally keep the IC in place? A dab of hot glue? Blutack? (:D)

[GARTHWILSON]

Oneironaut wrote:

Once you solder the 4 bent legs, the IC is pretty well affixed since it seats nice in the socket.
Here is a closeup of the operation...

viewtopic.php?f=4&t=3329

You can put the &start=__ on the end to make the desired post show up at the top, in this case viewtopic.php?f=4&t=3329&start=9 . The posts leading up to it won't show. There's a way to show the normal page but have it pre-scrolled down to the right post, but I don't know how to do it short of finding something to do a search on and using the search results, then taking out the &hilit up to the # which holds the search terms to highlight. In this case, we get viewtopic.php?f=4&t=3329&p=38423#p38423 .