Breaking 6502 apart
- GARTHWILSON
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Re: Breaking 6502 apart
"E" usually means "enable."
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
Re: Breaking 6502 apart
I used russian letter "П" as level-triggered input)
If you understand russian, I have detailed description of these circuits here : http://breaknes.com/info/6502_top
If you understand russian, I have detailed description of these circuits here : http://breaknes.com/info/6502_top
6502 addict
Re: Breaking 6502 apart
Back to the E! It's recognised as meaning Enable.
Cheers
Ed
Cheers
Ed
Re: Breaking 6502 apart
Todays speccy : flags.
This circuit is controlled by random logic, by following commands:
DB/P : load I, D, Z flags from internal data bus
IR5/I : used to handle SEI/CLI instructions
IR5/C : used to handle SEC/CLC instructions
DB/C : load C flag, from internal data bus
ACR/C : put ALU carry out to C flag
IR5/D : used to handle SED/CLD instructions
DBZ/Z : put ALU zero result to Z flag
1/V : forced whenever input pad SO is set
0/V : used to handle CLV instruction
DB/V : load V flag, from internal data bus
AVR/V : put ALU overflow out to V flag
DB/N : load N flag, from internal data bus
P/DB : enables tri-state buffer, to connect flags output with internal data bus.
B flag is located in interrupt handling circuit, on the left side of 6502.
Flags circuitry is rather simple. We have sync'ed latch, with NAND cutoff, whenever random logic issues any command to this flag (NOR gate).
Random logic commands reload latch, corresponding to new source value.
If we do not have any commands, cut-off NAND works as simple inverter, to reload output latch by old value.
Note, that flags output is in inverted logic, so it gets reinverted back again, before connecting output with internal data bus.
Phew)
This circuit is controlled by random logic, by following commands:
DB/P : load I, D, Z flags from internal data bus
IR5/I : used to handle SEI/CLI instructions
IR5/C : used to handle SEC/CLC instructions
DB/C : load C flag, from internal data bus
ACR/C : put ALU carry out to C flag
IR5/D : used to handle SED/CLD instructions
DBZ/Z : put ALU zero result to Z flag
1/V : forced whenever input pad SO is set
0/V : used to handle CLV instruction
DB/V : load V flag, from internal data bus
AVR/V : put ALU overflow out to V flag
DB/N : load N flag, from internal data bus
P/DB : enables tri-state buffer, to connect flags output with internal data bus.
B flag is located in interrupt handling circuit, on the left side of 6502.
Flags circuitry is rather simple. We have sync'ed latch, with NAND cutoff, whenever random logic issues any command to this flag (NOR gate).
Random logic commands reload latch, corresponding to new source value.
If we do not have any commands, cut-off NAND works as simple inverter, to reload output latch by old value.
Note, that flags output is in inverted logic, so it gets reinverted back again, before connecting output with internal data bus.
Phew)
6502 addict
Re: Breaking 6502 apart
Todays speccy: program control
And some vintage tricks from MOS engineers


And some vintage tricks from MOS engineers


6502 addict
Re: Breaking 6502 apart
Todays speccy: complete 6502 dispatch unit.
Last edited by org on Wed May 29, 2013 8:09 pm, edited 1 time in total.
6502 addict
Re: Breaking 6502 apart
That's neat!
Re: Breaking 6502 apart
As always, latest versions of all circuits can be found here : https://www.circuitlab.com/user/org/
6502 addict
Re: Breaking 6502 apart
What are the long rectangles at the top feeding in to the circuits at the bottom? For example, the two on the left labeled BRK2 and JSR3. And what are the IR1, IR7, etc. labels and marking on these bars?