I'm slowly working towards building an all-CMOS portable computer with a 6309 CPU at its core. I've come up with some rough designs, and I was wondering if there are any bad design decisions in there. Particularly, I'm worried about speed and how much current it will take to drive various chips on the bus. The CPU is only at 1Mhz, but I hear the 6809 requires rather fast peripherals.
I've made some ASCII diagrams explaining the general design here: http://pastebin.com/kXnhqaTG
6309 computer
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GARTHWILSON
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Why not use a 65c02 or even 65816? (This is a 6502 forum after all. 
) The bus is nearly identical and all the 65xx made today are spec'ed for at least 14MHz and will typically run quite a bit faster if the memory and peripherals are up to it. Your address decoding has a lot more propagation delay than necessary though, especially having cascaded 138's. You can get more memory and more I/O with the scheme shown in my "Tip of the Day" #23 at viewtopic.php?t=342&start=23 . (The topic starts at viewtopic.php?t=342 .) The very fastest way will include selecting RAM ASAP and just not enabling the write until φ2 rises; but I'm using the scheme shown at 5MHz. It runs up to 7MHz with 4MHz parts but I back it down for a little margin for dependability. You can do the whole thing with a single quad NAND. I'm using 32KB of ROM and 16KB of SRAM; but with a little twist, you can make it the other way around.
If you are interested in the 65816 for its 16-bit registers and additional instructions and addressing modes but the 24-bit bus looks like extra complication, remember you don't have to latch, decode, or use the high 8 bits of it if a 16-bit bus is adequate for what you want to do. You'll still get a load of benefits.
The data sheets, available at http://www.westerndesigncenter.com/wdc/ ... tation.cfm (they're on this website too at http://6502.org/documents/datasheets/wdc/ but for some reason it doesn't seem to work at the moment), say a max of 1.5mA/MHz (with tester loading) for the 65c02. The output drivers are very strong, so you definitely don't need buffers to feed the bus.
My website linked below has a ton of related links on the links page.
) The bus is nearly identical and all the 65xx made today are spec'ed for at least 14MHz and will typically run quite a bit faster if the memory and peripherals are up to it. Your address decoding has a lot more propagation delay than necessary though, especially having cascaded 138's. You can get more memory and more I/O with the scheme shown in my "Tip of the Day" #23 at viewtopic.php?t=342&start=23 . (The topic starts at viewtopic.php?t=342 .) The very fastest way will include selecting RAM ASAP and just not enabling the write until φ2 rises; but I'm using the scheme shown at 5MHz. It runs up to 7MHz with 4MHz parts but I back it down for a little margin for dependability. You can do the whole thing with a single quad NAND. I'm using 32KB of ROM and 16KB of SRAM; but with a little twist, you can make it the other way around.If you are interested in the 65816 for its 16-bit registers and additional instructions and addressing modes but the 24-bit bus looks like extra complication, remember you don't have to latch, decode, or use the high 8 bits of it if a 16-bit bus is adequate for what you want to do. You'll still get a load of benefits.
The data sheets, available at http://www.westerndesigncenter.com/wdc/ ... tation.cfm (they're on this website too at http://6502.org/documents/datasheets/wdc/ but for some reason it doesn't seem to work at the moment), say a max of 1.5mA/MHz (with tester loading) for the 65c02. The output drivers are very strong, so you definitely don't need buffers to feed the bus.
My website linked below has a ton of related links on the links page.
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
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superbilly
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GARTHWILSON wrote:
Why not use a 65c02 or even 65816? (This is a 6502 forum after all. :D ) The bus is nearly identical and all the 65xx made today are spec'ed for at least 14MHz and will typically run quite a bit faster if the memory and peripherals are up to it.
GARTHWILSON wrote:
Your address decoding has a lot more propagation delay than necessary though, especially having cascaded 138's. You can get more memory and more I/O with the scheme shown in my "Tip of the Day" #23 at viewtopic.php?t=342&start=23 . (The topic starts at viewtopic.php?t=342 .) The very fastest way will include selecting RAM ASAP and just not enabling the write until φ2 rises; but I'm using the scheme shown at 5MHz. It runs up to 7MHz with 4MHz parts but I back it down for a little margin for dependability. You can do the whole thing with a single quad NAND. I'm using 32KB of ROM and 16KB of SRAM; but with a little twist, you can make it the other way around.
GARTHWILSON wrote:
If you are interested in the 65816 for its 16-bit registers and additional instructions and addressing modes but the 24-bit bus looks like extra complication, remember you don't have to latch, decode, or use the high 8 bits of it if a 16-bit bus is adequate for what you want to do. You'll still get a load of benefits.
GARTHWILSON wrote:
The data sheets, available at http://www.westerndesigncenter.com/wdc/ ... tation.cfm (they're on this website too at http://6502.org/documents/datasheets/wdc/ but for some reason it doesn't seem to work at the moment), say a max of 1.5mA/MHz (with tester loading) for the 65c02. The output drivers are very strong, so you definitely don't need buffers to feed the bus.
I guess my main thought here is that the 65816 seems like a useful CPU, it's just that there are fewer registers and operations that it can perform...
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GARTHWILSON
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As you may know, the 6502's zero page is basically 256 bytes of processor registers. On the '816, you can have lots of sets of "zero pages," the 256-byte range being set by the 16-bit direct-page register. The 6502's hardware stack is in page 1, ie, address $100-$1FF, but on the '816, it can be tens of thousands of bytes—although I've never needed anywhere near even one whole page.
When you know you're accessing the stacks constantly but don't know what the maximum depth is you're using, the tendency is to go overboard and keep upping your estimation, "just to be sure." I did this for years myself, and finally decided to do some tests to find out. I filled the 6502 stack area with a constant value (maybe it was 00—I don't remember), ran a heavy-ish application with all the interrupts going too, did compiling, assembling, and interpreting while running other things in the background on interrupts, and after awhile looked to see how much of the stack area had been written on. It wasn't really much—less than 20% of each of page 1 (return stack) and page 0 (data stack). This was in Forth, which makes heavy use of the stacks. The IRQ interrupt handlers were in Forth too, although the software RTC (run off a timer on NMI) was not. If you use an '816 and dedicate 64 bytes of stack space and 64 bytes of DP space to each program you have running concurrently, you could have hundreds of such programs and still have plenty of room in bank 0 for ISRs, the reset routine, etc.. The individual programs themselves would go in other banks.
Even 30 years ago though, people naturally thought the Z80 for example, which has more registers, wider registers, and a higher clock speed, should vastly outperform the 6502; yet the 6502 (and 6800) routinely did better in benchmark tests. The 6502 runs Forth about 25% faster than a 6800 at a given clock speed.
You'll get a small step up from the 6502 to the 65c02, and a much bigger step up from there to the 65816. Even a 6502 outperforms an 8086 though in the Sieve of Eratosthenes benchmark in cycles required to finish the job though, in spite of number and size of registers, and all the more an 8088. For completing ten iterations of the Sieve:
IOW, a 4MHz 65816 did it faster than an 8MHz 8086 which has more and wider registers, yet none of the production 65816's available off the shelf today are rated for any less than 14MHz. The fastest '816 did it faster than the fastest 68000 which had 32-bit registers and a lot more of them. I also find the '816 much easier to program than the 6502. (See an example here.) It has more instructions and addressing modes, and features that make it far better suited for code relocation, multitasking, and a lot of other things where the 6502 is either clumsy or totally inept.
Do I sound like a 65816 salesman?
When you know you're accessing the stacks constantly but don't know what the maximum depth is you're using, the tendency is to go overboard and keep upping your estimation, "just to be sure." I did this for years myself, and finally decided to do some tests to find out. I filled the 6502 stack area with a constant value (maybe it was 00—I don't remember), ran a heavy-ish application with all the interrupts going too, did compiling, assembling, and interpreting while running other things in the background on interrupts, and after awhile looked to see how much of the stack area had been written on. It wasn't really much—less than 20% of each of page 1 (return stack) and page 0 (data stack). This was in Forth, which makes heavy use of the stacks. The IRQ interrupt handlers were in Forth too, although the software RTC (run off a timer on NMI) was not. If you use an '816 and dedicate 64 bytes of stack space and 64 bytes of DP space to each program you have running concurrently, you could have hundreds of such programs and still have plenty of room in bank 0 for ISRs, the reset routine, etc.. The individual programs themselves would go in other banks.
Even 30 years ago though, people naturally thought the Z80 for example, which has more registers, wider registers, and a higher clock speed, should vastly outperform the 6502; yet the 6502 (and 6800) routinely did better in benchmark tests. The 6502 runs Forth about 25% faster than a 6800 at a given clock speed.
You'll get a small step up from the 6502 to the 65c02, and a much bigger step up from there to the 65816. Even a 6502 outperforms an 8086 though in the Sieve of Eratosthenes benchmark in cycles required to finish the job though, in spite of number and size of registers, and all the more an 8088. For completing ten iterations of the Sieve:
Code: Select all
5MHz 8088 4.0 seconds
4MHz 6502 3.1 seconds
8MHz 8086 1.9 seconds
4MHz 65816 1.56 seconds
8MHz 65816 .78 seconds
8MHz 68000 .49 seconds
16MHz 65816 .39 secondsDo I sound like a 65816 salesman?
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
Hi, superbilly -- welcome to the Forum! A couple more points for you to consider regarding your project...
You mentioned wanting to build a portable computer, which implies that it should be small. So it's worth remembering that the 65C816 is available in a 44-pin PLCC package, which occupies significantly less board space than a 40-pin DIP. (Of course you can get memory chips in PLCC, too; also peripherals such as the 65C22.) As you may know, PLCCs use .050" pin spacing on the chip itself, but a PLCC socket spreads things out a bit. You still save space, and everything's on the usual .1" grid.
Unfortunately, addressable memory on the 6309 is only 64K! Since your plan includes a 128KB flash, you will need to contrive some scheme to extend the 6309 address range. That'll consume board space and be awkward to program. The '816, on the other hand, is built to easily handle up to 16 megabytes...
IMO the WDC '816 data sheet does a terrible job of describing all the address modes. Luckily, other sources of info are available -- including the helpful gang here at 6502.org!
I can understand your attraction to the 6309 (ie, Hitachi's CMOS version of the Motola 6809). But have you investigated its availability? It (and the 29F010 flash) may be hard to find.
Edit: in this post, nonarkitten talks the HCS08 and HCS12 processors from NXP (nee Freescale; Motorola). Although a different animal from the 6309, the NXP chips do (like the 6309) inherit many impressive features from the 6809. Plus, the NXP chips are more modern, with higher clock speeds and fewer concerns about availability.
Amen! And, speaking of address modes, on the '816 you can set up 24-bit indirect pointers to memory! (3 zero-page bytes each)
-- Jeff
You mentioned wanting to build a portable computer, which implies that it should be small. So it's worth remembering that the 65C816 is available in a 44-pin PLCC package, which occupies significantly less board space than a 40-pin DIP. (Of course you can get memory chips in PLCC, too; also peripherals such as the 65C22.) As you may know, PLCCs use .050" pin spacing on the chip itself, but a PLCC socket spreads things out a bit. You still save space, and everything's on the usual .1" grid.
superbilly wrote:
the 6309 has [...] index and stack registers that span all addressable memory.
superbilly wrote:
Maybe the WDC datasheet isn't the most clear and I should look elsewhere. The nice thing about their chips is that they're still in production-- the 6309 is pretty obscure by comparison.
I can understand your attraction to the 6309 (ie, Hitachi's CMOS version of the Motola 6809). But have you investigated its availability? It (and the 29F010 flash) may be hard to find.
Edit: in this post, nonarkitten talks the HCS08 and HCS12 processors from NXP (nee Freescale; Motorola). Although a different animal from the 6309, the NXP chips do (like the 6309) inherit many impressive features from the 6809. Plus, the NXP chips are more modern, with higher clock speeds and fewer concerns about availability.
GARTHWILSON wrote:
As you may know, the 6502's zero page is basically 256 bytes of processor registers.
-- Jeff
Last edited by Dr Jefyll on Wed Apr 29, 2020 2:08 am, edited 1 time in total.
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BigDumbDinosaur
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6309? What for?
First, welcome, Superbilly, to our 6502 forum.
Second, look at the 65C816 and also read here for some info about a simple 65C816-powered computer. Also, you might be interested in Daryl Rictor's 65C816-powered SBC, which makes use of programmable logic instead of 74xx silicon.
In my opinion, about all the 6309 has going for it is more registers. In all other respects, it is (again, in my opinion) inferior to the 65xx family. The fact that the 65xx family has had overwhelming success over the years and the 6309 is an obscure, out-of-production part should tell you something.
As Garth pointed out, the 65C816 is very flexible, especially with its relocatable zero page (aka direct page) and stack. Also, it has useful stack relative addressing instructions that are tailor-made for creating fully re-entrant subroutines. With separate vectors for each interrupt type, as well as an /ABORT input for dealing with memory access violations or bus errors, it is an easy processor with which to build a surprisingly powerful computer.
Speaking of interrupts, the 65xx family has one of the lowest interrupt latency specs of any microprocessor, past or present. For example, the 65C02, using the WAI instruction and an inline IRQ service routine, can react to an interrupt in as little as two clock cycles. Even when a standard vectored IRQ service routine is used, response can occur in as few as seven clock cycles.
After fixing a simple fabrication error on my part, I was able to get my POC unit working on the first try and have progressed to where I have working SCSI connected to it. If I can do it so can you. After all, I'm just a big, dumb dinosaur.
Please reconsider your plans to use the 6309 and instead put the 65xx family to work for you.
Second, look at the 65C816 and also read here for some info about a simple 65C816-powered computer. Also, you might be interested in Daryl Rictor's 65C816-powered SBC, which makes use of programmable logic instead of 74xx silicon.
In my opinion, about all the 6309 has going for it is more registers. In all other respects, it is (again, in my opinion) inferior to the 65xx family. The fact that the 65xx family has had overwhelming success over the years and the 6309 is an obscure, out-of-production part should tell you something.
As Garth pointed out, the 65C816 is very flexible, especially with its relocatable zero page (aka direct page) and stack. Also, it has useful stack relative addressing instructions that are tailor-made for creating fully re-entrant subroutines. With separate vectors for each interrupt type, as well as an /ABORT input for dealing with memory access violations or bus errors, it is an easy processor with which to build a surprisingly powerful computer.
Speaking of interrupts, the 65xx family has one of the lowest interrupt latency specs of any microprocessor, past or present. For example, the 65C02, using the WAI instruction and an inline IRQ service routine, can react to an interrupt in as little as two clock cycles. Even when a standard vectored IRQ service routine is used, response can occur in as few as seven clock cycles.
After fixing a simple fabrication error on my part, I was able to get my POC unit working on the first try and have progressed to where I have working SCSI connected to it. If I can do it so can you. After all, I'm just a big, dumb dinosaur.
Please reconsider your plans to use the 6309 and instead put the 65xx family to work for you.
x86? We ain't got no x86. We don't NEED no stinking x86!
When i wanted to build a sbc myself, i went on ebay, and i found a a cheap MC6809, so i bought it... I started making plans, setting up schematics, but after a while i figured out that i didn't have much software that could run on it. After a while i decided to get a 6502 so i bought a CM630P (Bulgarian clone). After a while, i got a sbc board that was running Basic! Also there is the cc65 c compiler, and lots of other software.
As for the MC6809 i have it sitting in a white box with some other ic, and i wonder where could i use it... Also the MC68000 has lots of software support(like the IDE68K with its c compiler), i also built a 68k based sbc, but i am now waiting for 8BIT's lcd miracle solution. At the end i chose the 6502 only because it had better software support.
As for the MC6809 i have it sitting in a white box with some other ic, and i wonder where could i use it... Also the MC68000 has lots of software support(like the IDE68K with its c compiler), i also built a 68k based sbc, but i am now waiting for 8BIT's lcd miracle solution. At the end i chose the 6502 only because it had better software support.
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leeeeee
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Quote:
Also the MC68000 has lots of software support
</shameless plug>
Lee.
I'd echo Jeff's point about the possible difficulty of getting a 6309, but for a hobby SBC you only need one or two.
For questions of bus loading and timing, it might be worth referencing other 6309 and 6809 designs. For example, The 4Mhz CoCo3 Project and Grant's 6809 computer
I notice a recent victory in retrofitting a 6809 (or 6309) to Atari 6502-based computers: the Liber809 project. (Via Hackaday)
As for software, that project is aimed at, or looking at, NitrOS-9, which describes itself as "a real-time, process-based, multitasking, multi-user, Unix-like operating system" which sounds interesting enough.
(I found my 6809/6309 'research' interesting enough because of the backstory of the revelation of Hitachi's extra registers and opcodes. The above-mentioned 4MHz project is interesting for speeding up non-bus-access cycles, and comes with a handy chart of opcodes and timings. The instruction encodings are interesting too, from a perspective of those of us looking at 6502 extensions!)
Cheers
Ed
For questions of bus loading and timing, it might be worth referencing other 6309 and 6809 designs. For example, The 4Mhz CoCo3 Project and Grant's 6809 computer
I notice a recent victory in retrofitting a 6809 (or 6309) to Atari 6502-based computers: the Liber809 project. (Via Hackaday)
As for software, that project is aimed at, or looking at, NitrOS-9, which describes itself as "a real-time, process-based, multitasking, multi-user, Unix-like operating system" which sounds interesting enough.
(I found my 6809/6309 'research' interesting enough because of the backstory of the revelation of Hitachi's extra registers and opcodes. The above-mentioned 4MHz project is interesting for speeding up non-bus-access cycles, and comes with a handy chart of opcodes and timings. The instruction encodings are interesting too, from a perspective of those of us looking at 6502 extensions!)
Cheers
Ed
leeeeee wrote:
Quote:
Also the MC68000 has lots of software support
</shameless plug>
Lee.
It would be great to see a tutorial on how to setup 68000 EhBasic.
Re: 6309 computer
for what it`s worth, if anyone needs one and can`t find any, I have 17x 63B09`s here all pulled from working machines.
Also on Twitter as "YT2095".
Re: 6309 computer
6309 is in fact really interesting. 6809 was already a pretty good chip for running Forth by offering a second stack pointer. 6309's extra registers (and the ability to combine them into 16-bit and even a 32-bit register), as well as block move instructions are a really interesting lesson in Instruction Set Architecture. I will take another look at the manuals when time permits.
EBay is full of Chinese 63B09s, some under $3.00 plus shipping. I wonder how fast these go.
EBay is full of Chinese 63B09s, some under $3.00 plus shipping. I wonder how fast these go.
In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut
Re: 6309 computer
It does look like an interesting CPU!