OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

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ttlworks
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OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by ttlworks »

MOS\CSG 5721R0, BUSTER: Amiga 2000 Expansion Bus arbiter, CMOS chip.

Frank told me, that the 5721R0 actually is version 2 of the chip.
And that the 5721R0 was manufactured at MOS\CSG,
while the previous versions were manufactured somewhere else.

Version 2 is the last version of the chip,
so DMA with PAL timing is supposed to work.

;---

A 5721R0 chip was donated to Zeptobars by Frank.
Zeptobars made a nice microscopic picture of the chip.
The resolution of the microscopic picture was good enough for me to do a chip dissection.
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ttlworks
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Re: OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by ttlworks »

5721R0 Cheat Sheet:
5721r0_cheatsheet.png
Schematics in *.png and Eagle 6.4 file format:
5721r0_schematics_png_eagle6_4.zip
(2.8 MiB) Downloaded 36 times
Low resolution picture of the chip with the pads labelled:
//For the full resolution picture, go to Zeptobars.
5721r0_pads.png
Last edited by ttlworks on Thu Aug 01, 2024 9:40 am, edited 1 time in total.
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ttlworks
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Re: OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by ttlworks »

PTEST (pin 44 for the DIP-48 version of the chip).
In the Amiga 2000 schematics, nothing on the PCB connects to this pin.
An interesting question is, if that pin is bonded to a GND pad on the silicon
to allow detection whether the chip is present or not on the PCB.
//Remember the SENSE# pin on the 68881 ?

The basics for dissecting CMOS chips already were covered
in the 5719R4 dissection.

CAD at MOS\CSG noticably had improved since the 5719R4.
In the 5721R0:
Standard cells are rotated in 90° steps.
Layout for the latches now is incredibly compact.
Also, we now have CMOS combination gates, like AND\NOR and OR\NAND.

As a reference for further CMOS chip dissections,
I'm putting a catalog of the standard cells I had found in the 5721R0 here:
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ttlworks
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Re: OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by ttlworks »

si5721r0_e_latch.png
si5721r0_e_latch.png (32.86 KiB) Viewed 2563 times
5721r0_e_latch.png
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ttlworks
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Re: OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by ttlworks »

si5721r0_i_latch_clear.png
si5721r0_i_latch_clear.png (42.5 KiB) Viewed 2562 times
5721r0_i_latch_clear.png
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ttlworks
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Re: OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by ttlworks »

That's all for now.
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BigEd
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Re: OT: MOS\CSG 5721R0 dissection, Amiga 2000 BUSTER

Post by BigEd »

Another great eye-opener! I do like a die that's dominated by pads and drivers - although in this case, they squeezed out pretty much all the white space. It's kind of interesting that such a low-complexity chip is worthwhile to design: it does of course reduce part count, and board space, and might be faster than an unintegrated implementation. Oh, and might use less power.
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