Hi all.
How easy is it to add commands to osi basic for the multicomp 6502 8k rom image ??
Some pointers would be helpful as it looks like simply adding an entry to the token table ??
I got the source to compile but im looking to add a c64 style sys call and a monitor call.
Thanks in advance. Lee
Search found 14 matches
- Thu Nov 17, 2016 10:09 pm
- Forum: Programming
- Topic: Adding commands to osi basic....
- Replies: 2
- Views: 1034
- Wed Nov 16, 2016 10:38 am
- Forum: Programmable Logic
- Topic: 65C02 in verilog - extended version of Arlet's core
- Replies: 63
- Views: 28341
Re: 65C02 in verilog - extended version of Arlet's core
Will this work on grant searles multicomp ??
- Sun Nov 13, 2016 7:49 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
After looking at the gal programs on Daryl Rictors site and the multicomp from grant searle i thought the easiest thing for me to do was start with the multicomp design....
So, I have drawn up a board based on the multicomp cyclone 2 board from ebay.
Added 2 sockets for ram -as6c4008 and a ...
So, I have drawn up a board based on the multicomp cyclone 2 board from ebay.
Added 2 sockets for ram -as6c4008 and a ...
- Sun Nov 06, 2016 6:39 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Hi Vladimir,
I have a slight suspicion that you do it incorrectly sketched from somewhere
I can now see why you have said this, after trying to use WINCUPL i found your posts on here referencing the "FIELD" statement.But the ideas came from Daryl Rictor's website for me to use a GAL as a quick ...
I have a slight suspicion that you do it incorrectly sketched from somewhere
I can now see why you have said this, after trying to use WINCUPL i found your posts on here referencing the "FIELD" statement.But the ideas came from Daryl Rictor's website for me to use a GAL as a quick ...
- Fri Nov 04, 2016 6:51 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Hi Vladimir.
You are very correct. I used my lunchtime today to download wincupl and using an atf16v8b gal i can do all the address decoding i think.
Will post sim acreenshot soon as i think i got this right now but never used wincupl or any pld before today :D
As learning digital logic and ...
You are very correct. I used my lunchtime today to download wincupl and using an atf16v8b gal i can do all the address decoding i think.
Will post sim acreenshot soon as i think i got this right now but never used wincupl or any pld before today :D
As learning digital logic and ...
- Thu Nov 03, 2016 9:05 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Thanks for clarifying that chaps . Will look at alternatives to tying the outputs together.
I need to do some reading up
I guess i can do the adressing with just 1 more OR gate / ic.
Apart from the wired logic do you think the addressing is otherwise good ??
Lee
I need to do some reading up
I guess i can do the adressing with just 1 more OR gate / ic.
Apart from the wired logic do you think the addressing is otherwise good ??
Lee
- Thu Nov 03, 2016 8:38 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Using ac chips total delay should be less than 50ns at 5v ?
Unless i misread datasheets maybe ?
Lee
Unless i misread datasheets maybe ?
Lee
- Thu Nov 03, 2016 7:39 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Vladimir wrote:
Outputs of IC2a and IC2b are connected together (totem-pole output stages!). This is unacceptable. 
Lee
- Thu Nov 03, 2016 5:13 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Hi Vladimir.
The address lines 8 to 15 connect to P
The links select IO page befor the 138 chops the page into 32 bytes x 8
FC00 is 1111 1100 on links
FD00 is 1111 1101 on links
Lee
The address lines 8 to 15 connect to P
The links select IO page befor the 138 chops the page into 32 bytes x 8
FC00 is 1111 1100 on links
FD00 is 1111 1101 on links
Lee
- Thu Nov 03, 2016 3:11 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Hi All,
Knocked up the memory map decoding schematic, What do you all think ?
Using the 521 not the 520 in the schematic......
ADDRESS LEE1.JPG
The jumper is obviously to select 16 or 32k ROM ...
ADDRESS LEE2.JPG
Welcome your comments :D
Lee
Please post your schematics in monochrome for ...
Knocked up the memory map decoding schematic, What do you all think ?
Using the 521 not the 520 in the schematic......
ADDRESS LEE1.JPG
The jumper is obviously to select 16 or 32k ROM ...
ADDRESS LEE2.JPG
Welcome your comments :D
Lee
Please post your schematics in monochrome for ...
- Thu Nov 03, 2016 1:57 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Hi All,
Knocked up the memory map decoding schematic, What do you all think ?
Using the 521 not the 520 in the schematic......
The jumper is obviously to select 16 or 32k ROM ...
Welcome your comments
Lee
Knocked up the memory map decoding schematic, What do you all think ?
Using the 521 not the 520 in the schematic......
The jumper is obviously to select 16 or 32k ROM ...
Welcome your comments
Lee
- Wed Nov 02, 2016 7:55 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Thanks for the great replies.
I have been giving this lots of thought over the last few days before posting on here.
Excellent point about the clock stretching Jeff as that hadnt occurred to me, So now im wondering if the IO chips need the main clock or can i supply a secondary clock to them ...
I have been giving this lots of thought over the last few days before posting on here.
Excellent point about the clock stretching Jeff as that hadnt occurred to me, So now im wondering if the IO chips need the main clock or can i supply a secondary clock to them ...
- Wed Nov 02, 2016 8:55 am
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Re: Wait state for 3.6mhz
Thanks, Jeff, Vladimir.
Maybe i should start at 0.9mhz to ensure things start well.
Looks like i need to investigate how to ensure CS goes low before PHI2.
As a beginner and from what i have read it seems that the SID is 1mhz max, a la C64.
V9958 is 2mhz max
My 6522's are from ebay so assuming ...
Maybe i should start at 0.9mhz to ensure things start well.
Looks like i need to investigate how to ensure CS goes low before PHI2.
As a beginner and from what i have read it seems that the SID is 1mhz max, a la C64.
V9958 is 2mhz max
My 6522's are from ebay so assuming ...
- Tue Nov 01, 2016 9:25 pm
- Forum: Newbies
- Topic: Wait state for 3.6mhz
- Replies: 28
- Views: 3777
Wait state for 3.6mhz
Hi all.
Im thinking of building a 6502 system comprising of.....
W65c02-10mhz
Rockwell6522 . 2off
6850 1 or 2 off (1 for midi)
Sid (prob swinsid as got 2) 2 off
V9958 video......Yea can see this being a pig......
The problem is speed. The sid afaik tops out at 1mhz so im looking for a wait state ...
Im thinking of building a 6502 system comprising of.....
W65c02-10mhz
Rockwell6522 . 2off
6850 1 or 2 off (1 for midi)
Sid (prob swinsid as got 2) 2 off
V9958 video......Yea can see this being a pig......
The problem is speed. The sid afaik tops out at 1mhz so im looking for a wait state ...