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Vladimir
PostPosted: Thu Nov 03, 2016 5:03 pm 
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Location: Irkutsk, Russia
Hi Braincell1973!
Clarify please,
what signals are applied to inputs P0 - P7 of IC5 and IC6?
What jumpers should be shorted?

Vladimir
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Braincell1973
PostPosted: Thu Nov 03, 2016 5:13 pm 
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Hi Vladimir.

The address lines 8 to 15 connect to P

The links select IO page befor the 138 chops the page into 32 bytes x 8

FC00 is 1111 1100 on links
FD00 is 1111 1101 on links

Lee :D
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Vladimir
PostPosted: Thu Nov 03, 2016 7:20 pm 
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Outputs of IC2a and IC2b are connected together (totem-pole output stages!). This is unacceptable. :?
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Braincell1973
PostPosted: Thu Nov 03, 2016 7:39 pm 
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Vladimir wrote:
Outputs of IC2a and IC2b are connected together (totem-pole output stages!). This is unacceptable. :?


What if i used open collector ? 74ac05 instead ?

Lee
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Vladimir
PostPosted: Thu Nov 03, 2016 8:32 pm 
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Braincell1973 wrote:

What if i used open collector ? 74ac05 instead ?

Lee


The quick answer is - undesirable. The propagation delay increases due to the big rise time. But I can not accurately estimate the final result. May be, for low frequensies, this is not a problem.
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Braincell1973
PostPosted: Thu Nov 03, 2016 8:38 pm 
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Using ac chips total delay should be less than 50ns at 5v ?

Unless i misread datasheets maybe ?

Lee
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GARTHWILSON
PostPosted: Thu Nov 03, 2016 8:44 pm 
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Open-collector slows things waaaaaay down. The rise time's time constant is the resistor value times the capacitance of the load. Let's say there's 25pF from the connected loads (including output pins), the traces, and sockets. Then let's say you use a 3.3K pull-up resistor. 3.3K times 25pF is 82ns. Putting another gate in, if necessary, would be far better.

While I'm here, I seem to remember a mention of 4000-series logic earlier. Those are super slow too, unless you use something like 74HC4xxx (and even then, some of those are still pretty slow). Otherwise, 4000-series is best left for the times when you need higher voltage (like 12V) and speed is not important.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
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Braincell1973
PostPosted: Thu Nov 03, 2016 9:05 pm 
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Thanks for clarifying that chaps . Will look at alternatives to tying the outputs together.

I need to do some reading up :D

I guess i can do the adressing with just 1 more OR gate / ic.

Apart from the wired logic do you think the addressing is otherwise good ??

Lee
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Vladimir
PostPosted: Fri Nov 04, 2016 4:05 am 
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Braincell1973 wrote:

Apart from the wired logic do you think the addressing is otherwise good ??

Lee


Do you hope? There is a lot of work to do :D
For example, if you select ROM or HIRAM, A15 must be HIGH. Right? But, at A15= HIGH your IC2c asserts /LORAMSELECT. Isn't it ?
Really, A15 and /LORAMSELECT should be the same, without any inverting.
Further. If IO is selected, the output of 74AC520 is LOW. Keep this in mind.
One more thing. It seems, you want /HIGHRAMSELECT to be in range $8000 ÷ $BFFF ( i.e. A15=HIGH and A14=LOW). But, I see, you did not do it. At SJ1 = 2-3 your /HIRAMSELECT becomes active for range $0000 - $7FFF. At SJ1 = 1-2 the range becomes $0000 - $BFFF.
And so on. You have something to think about.

Cheers
Vladimir

P.S. Tell me please (if it is not a secret), what do you benefit from the opportunity to change the basic addresses of IO peripherals? I believe, permutation of any jumper entails the need to rewrite the IO routines. Isn't it?

P.P.S. A8 signal harms the working of AC138 decoders (at least of second one, IC4). Don't route it there. G2A inputs should be grounded. G1 inputs of AC520 likewise.
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Braincell1973
PostPosted: Fri Nov 04, 2016 6:51 pm 
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Hi Vladimir.
You are very correct. I used my lunchtime today to download wincupl and using an atf16v8b gal i can do all the address decoding i think.

Will post sim acreenshot soon as i think i got this right now but never used wincupl or any pld before today :D

As learning digital logic and assembler may as learn a bit about gals too....... :D

Yes moving the io maps are pointless so will hard code 2 pages (16ios) using the gal.

What do you mean about the a8 ? I need to decode 32byte pages ?
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Vladimir
PostPosted: Sat Nov 05, 2016 4:37 pm 
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Hi Lee!
Sorry for slow reply. (BTW, we live in different time zones. This is not conducive to comfortable communication).

Braincell1973 wrote:
... I used my lunchtime today to download wincupl and using an atf16v8b gal i can do all the address decoding i think...


I read some reports about problems with ATMEL SPLDs (including ATF16V8). Specifically, not any GAL programmer copes with such devices. Lattice equivalent (i.e. GAL16V8) is reputedly more preferable.
At least, you ought to make sure your programmer is suitable for those devices.

Braincell1973 wrote:
What do you mean about the a8 ? I need to decode 32byte pages ?

I do not understand, wich a need forces you to connect address line A8 to AC138 decoders? I see, A8 is connected to pin 4 of each AC138. What for?
I have a slight suspicion that you do it incorrectly sketched from somewhere. Perhaps there was an address line connected to different inputs of AC138 decoders, for example, to pin 6 and pin 4. Isn't it?

Cheers

Vladimir
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Braincell1973
PostPosted: Sun Nov 06, 2016 6:39 pm 
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Hi Vladimir,
Vladimir wrote:
I have a slight suspicion that you do it incorrectly sketched from somewhere


I can now see why you have said this, after trying to use WINCUPL i found your posts on here referencing the "FIELD" statement.But the ideas came from Daryl Rictor's website for me to use a GAL as a quick look at his source code made it look simple enough to program a GAL (I have a tl866cs somewhere).

Here is the revised decoding logic using an atf16v8b,

2 pages for IO at FE00 and FD00 each with 8x 32 byte access
16k ROM
48k RAM

Attachment:
address decode lee.png
address decode lee.png [ 3.78 KiB | Viewed 1163 times ]


Attachment:
lee address decode 2.jpg
lee address decode 2.jpg [ 136.75 KiB | Viewed 1163 times ]


Code:
Name     address1 ;
PartNo   001 ;
Date     04/11/2016 ;
Revision 01 ;
Designer Engineer ;
Company  Na ;
Assembly None ;
Location None ;
Device   g16v8a ;

/* *************** INPUT PINS *********************/
PIN   2  =  A8                        ; /*                                 */
PIN   3  =  A9                        ; /*                                 */
PIN   4  =  A10                       ; /*                                 */
PIN   5  =  A11                       ; /*                                 */
PIN   6  =  A12                       ; /*                                 */
PIN   7  =  A13                       ; /*                                 */
PIN   8  =  A14                       ; /*                                 */
PIN   9  =  A15                       ; /*                                 */
PIN   12  = PHI2                      ; /*                                 */ 
PIN   13  = RW                        ; /*                                 */

/* *************** OUTPUT PINS *********************/
PIN   19  = !IO1                       ; /*                                 */
PIN   18  = !IO2                       ; /*                                 */
PIN   17  = !ROMSEL                    ; /*                                 */
PIN   16  = !RAMSEL                    ; /*                                 */
PIN   15  = !WE                        ; /*                                 */
PIN   14  = !OE                        ; /*                                 */

/* *************** LOGIC *********************/

FIELD ADDRESS = [A15..8]                  ;
 
IO1 = ADDRESS:[FD00]                         ;
IO2 = ADDRESS:[FE00]                           ;
ROMSEL = ADDRESS:[C000..FCFF]
        # ADDRESS:[FF00..FFFF]               ;
RAMSEL = ADDRESS:[0000..BFFF]               ;
OE = (PHI2 & RW)                     ;
WE = (PHI2 & !RW)                     ;


There is enough space to do the read / write qualifying too :D

Lee
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Vladimir
PostPosted: Mon Nov 07, 2016 3:43 pm 
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Posts: 78
Location: Irkutsk, Russia
Hi Lee!
The most important thing that I can see, this decoder should be workable.
An other thing I noticed (looking at your screenshot) that you should familiarize yourself with MPU timing diagram. Not all sets of input levels that you do WinSimulate exist in a real system. Nevertheless, the decoder should operate, therefore you can blow off the dust from your programmer and try burning PLD.

Cheers
Vladimir
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Braincell1973
PostPosted: Sun Nov 13, 2016 7:49 pm 
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Posts: 14
After looking at the gal programs on Daryl Rictors site and the multicomp from grant searle i thought the easiest thing for me to do was start with the multicomp design....

So, I have drawn up a board based on the multicomp cyclone 2 board from ebay.
Added 2 sockets for ram -as6c4008 and a combined rom/ram socket
Expansion bus
Multicom bits ie 2off serial . Sd card . Comp / vga video . Ps2 keyboard
Added max3232 for serial 1
And finally added a ch376 port for the usb boards from ebay.

Attachment:
c4165bc14e60019282fd0166f2a886cc-28039_top.png
c4165bc14e60019282fd0166f2a886cc-28039_top.png [ 82.14 KiB | Viewed 1068 times ]

Attachment:
c4165bc14e60019282fd0166f2a886cc-28039_bottom.png
c4165bc14e60019282fd0166f2a886cc-28039_bottom.png [ 62.21 KiB | Viewed 1068 times ]


I have some ideas for a simple MMU and other cool bits

Lee
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