ttlworks

Yes you have explained what is missing.
The books I have read were written in the mid 80's.
So that's almost 10 years after the CPU is released.

I am reading the Elektor Junior Computer Book 1.
This is great. It explains what I am wanted to know.

Thanks for providing a real answer.

And now the descent has occurred.
Another post about manners and etiquette
but this thread is about "programming" (no its not that's
just a cover story to talk about mindless issues)
No answers have been given because I am
now at the conclusion that there are no answers.
Just point to other authors ...

Big Ed

Any web search engine will get you from any of the phrases
are quoting to the source material. You should follow those bread crumbs too, and do some reading.

Making an assumption of what you think
I am doing has lead you to errors. In my last post I did not receive any answer
then I ...

Doesn't help any unless you can name the book as there
are countless books for the Apple II.

What about this diagram?
This is an updated version of the 6502 CPU.

It was decapped, photo taken and block
diagram drawn.

Can anyone read this?

The reason the Apple II did two memory accesses per cycle is because the video circuitry accessed the RAM when the 6502 wasn't looking at the bus. The 6502 doesn't access the memory while the clock signal (Φ2) is high, so if the Bus Enable pin is used to tri-state the 6502's outputs, something else ...

The computer I use does not have ports.

Anyway, I went to your website and went to the page
on address decoding.

In fact, the Apple II did two memory accesses per cycle, two million per second at 1MHz, with the video accessing the memory during the first half of Φ2, and the processor during the ...

yes correction. the JSR pushes the address
Of the JSR onto the stack and the RTS pulls
The address off the stack.

as for the answer you gave in the 2nd
Part it is confusing. can you please
Explain within a computer. I am
Only concerning myself at this
Stage to the motherboard and no other
Devices ...

This is great stuff!!
Thanks for the replies and answers.

so basically the RTS operand is used
Push and pull the JSR address onto the stack,
Correct?

I have some more questions.
address bus- information transfers takes
Place in one direction. From the CPU
To memory. (correct?)

Now please comment ...

Big Ed
Thanks for the welcome!
Buses are a mystery to me can
You explain more/give definitions.
6502 only has 1 pin for R/W how
Is this done?

And I have completely different
Question about assembly language.
Why do JSR's need a RTS? If you
Have a JSR in your code the processor
Goes to this routine ...

I am interested in specifics of CPU. (ALU how it works with the
buses and R/W cycles). I need the technical information explained
and not just presented which I find alot of the 6502 books do.

I am at the stage where I need more information not just about the CPU
but how the architecutre works and fits all together. I am finding
random docs on line like datasheets for the CPU but that only
contains a portion of what I want to know.

Then I came across this:

http://uisprocesadores2008 ...

So how do you recognise Jump Tables looking through code?

I need to to be simplistic in order to understand the concet.
So far I have got this.

A jump table is a list of addresses of routines in a program. Use of a jump table in assembly language is very much like the ON GOTO verb in BASIC.

Now I refer to this code:
It is from Prince of Persia

org org ...

I have not found this term and would like to know what it is.
I have done a google search and wiki but find their definition
does not me any wiser.

1) Could someone give a clear definition of what is
2) And also a clear example (programming) of how it
is used.

I would like 65816 example, but if ...