Winbond: the ultimate videogame chip
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Nightmaretony
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Winbond: the ultimate videogame chip
"My biggest dream in life? Building black plywood Habitrails"
I would find it hard to believe that a "standard" chip (if one even existed) wouldn't allow the contents of RAM to be loaded from an external source and contents suitably executed. If it did support that, the chip would make a nice video coprocessor -- download code to draw lines and manage sprites for example, and let it do all the hard work, while your normal processor is off doing something else. There is no need, as far as I can see, to load your entire application into ROM in that case.
I am curious to learn how they are able to pull off 320x240 resolution at 256 colors -- that'd require more RAM than the somewhat less than 4KiB that is offered inside the chip. It almost has an Atari 2600 TIA feel to it, where the CPU would need to be active in updating various parts of the display in real-time.
I am curious to learn how they are able to pull off 320x240 resolution at 256 colors -- that'd require more RAM than the somewhat less than 4KiB that is offered inside the chip. It almost has an Atari 2600 TIA feel to it, where the CPU would need to be active in updating various parts of the display in real-time.
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smilingphoenix
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If i'm understanding the data sheet properly, the background layers are built up from tiles of 8x8 pixels. This reduces the memory requirements, since you only define the tile once, then use 1 byte per tile (or even 1 byte per 2 tiles) to identify the tile.
In addition, besides the 3.7k of program RAM, the chip has 2.9k of RAM and 1Mbyte of ROM dedicated to the video generator - I suspect it may come with a large library of defined tiles, set up as part of the user customisation process.
I may be totally wrong on this - the data sheet doesn't exactly go into detail, does it
In addition, besides the 3.7k of program RAM, the chip has 2.9k of RAM and 1Mbyte of ROM dedicated to the video generator - I suspect it may come with a large library of defined tiles, set up as part of the user customisation process.
I may be totally wrong on this - the data sheet doesn't exactly go into detail, does it
Shift to the left, shift to the right,
mask in, mask out,
BYTE! BYTE! BYTE!
mask in, mask out,
BYTE! BYTE! BYTE!
smilingphoenix wrote:
If i'm understanding the data sheet properly, the background layers are built up from tiles of 8x8 pixels. This reduces the memory requirements, since you only define the tile once, then use 1 byte per tile (or even 1 byte per 2 tiles) to identify the tile.
Quote:
In addition, besides the 3.7k of program RAM, the chip has 2.9k of RAM and 1Mbyte of ROM dedicated to the video generator - I suspect it may come with a large library of defined tiles, set up as part of the user customisation process.
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Nightmaretony
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The chip isnt a core, it is a full chip for sale with the 134 as core licensed from WDC.
It is used int he new generation of very low cost game consoles.
http://www.target.com/gp/detail.html/sr ... B00009VDXX
This would be a typical application of this chip.
http://www.target.com/gp/detail.html/sr ... B00029T4E2
Or this.
Very nice, the entire cpu, video and sound and io core in a single chip with only an external rom for the game.
It is used int he new generation of very low cost game consoles.
http://www.target.com/gp/detail.html/sr ... B00009VDXX
This would be a typical application of this chip.
http://www.target.com/gp/detail.html/sr ... B00029T4E2
Or this.
Very nice, the entire cpu, video and sound and io core in a single chip with only an external rom for the game.
"My biggest dream in life? Building black plywood Habitrails"
kc5tja wrote:
I can't fathom why anyone would want to continue to use a 6502 in any application like this when the 65816 offers, transistor for transistor and clock for clock, such a vastly superior capability.
1. I don't know if its less costly to license the 65C02 core than the 65816, but if it is, that would likely be a major factor, especially in high volume applications/products.
2. The 65816 ICs put the bank address on the data bus to keep the pin count down. If the 65816 core does the same, the 65C02 has the advantage that the data bus is free (without needing additional transceivers) for half the cycle.
3. The unused 65C02 opcodes are guaranteed 1 cycle NOPs, useful for applications requiring exact timing. All 65816 opcodes (including WDM) are 2 or more cycles.
None appear to be wildly compelling reasons to choose the 65C02 over the 65816, but #1 would seem to be the biggie (at least to me). I wouldn't think that #2 and #3 would be all that common.
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Nightmaretony
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