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PostPosted: Mon May 14, 2007 10:51 pm 
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http://www.winbond-usa.com/products/win ... 91a1.7.pdf


Check the internal processor. Booya!

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PostPosted: Tue May 15, 2007 12:57 am 
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Now we're talking. ;)


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PostPosted: Fri May 25, 2007 8:43 am 
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Looks like a nice chip! But what package is it in? The data sheet doesn't seem to say. Or should we start looking for TV games in the shops, that contain this chip so that we can open up the game and get hold of the chip that way?


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PostPosted: Fri May 25, 2007 10:38 am 
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coredump wrote:
Looks like a nice chip! But what package is it in?


As far as I understand it is only the IP core, not the "real" hardware.

André


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PostPosted: Thu May 31, 2007 8:26 pm 
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This is ROM based, so completely useless for the hobbyist.


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PostPosted: Sun Jun 03, 2007 4:20 am 
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It looked like it had a fair amount of RAM you could execute code from, though you'd need some kind of bootloader in ROM. Having a small run of them made with a bootloader would probably be too expensive for a hobbyist. Too bad, since it has a nifty feature set.


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PostPosted: Sun Jun 03, 2007 5:26 pm 
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I would find it hard to believe that a "standard" chip (if one even existed) wouldn't allow the contents of RAM to be loaded from an external source and contents suitably executed. If it did support that, the chip would make a nice video coprocessor -- download code to draw lines and manage sprites for example, and let it do all the hard work, while your normal processor is off doing something else. There is no need, as far as I can see, to load your entire application into ROM in that case.

I am curious to learn how they are able to pull off 320x240 resolution at 256 colors -- that'd require more RAM than the somewhat less than 4KiB that is offered inside the chip. It almost has an Atari 2600 TIA feel to it, where the CPU would need to be active in updating various parts of the display in real-time.


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PostPosted: Sun Jun 03, 2007 9:01 pm 
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If i'm understanding the data sheet properly, the background layers are built up from tiles of 8x8 pixels. This reduces the memory requirements, since you only define the tile once, then use 1 byte per tile (or even 1 byte per 2 tiles) to identify the tile.

In addition, besides the 3.7k of program RAM, the chip has 2.9k of RAM and 1Mbyte of ROM dedicated to the video generator - I suspect it may come with a large library of defined tiles, set up as part of the user customisation process.

I may be totally wrong on this - the data sheet doesn't exactly go into detail, does it :o

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PostPosted: Sun Jun 03, 2007 9:44 pm 
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smilingphoenix wrote:
If i'm understanding the data sheet properly, the background layers are built up from tiles of 8x8 pixels. This reduces the memory requirements, since you only define the tile once, then use 1 byte per tile (or even 1 byte per 2 tiles) to identify the tile.


Right -- thsi is the same way it's done on any other 8-bit architecture. Problem: the tile will be 64 bytes long in 256 color mode. And, if you want to display an arbitrary bitmap, you'll need over 1000 tiles (indeed, 1000 precisely gives you a 320x200 arbitrary bitmap).

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In addition, besides the 3.7k of program RAM, the chip has 2.9k of RAM and 1Mbyte of ROM dedicated to the video generator - I suspect it may come with a large library of defined tiles, set up as part of the user customisation process.


Right, and that's pretty much ideal for arcade game applications, but I still see it as being very limiting in general. I'd be happier if the ROM was left external to the chip, because then you could at least "trick it" by substituting RAM for it.


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PostPosted: Fri Jul 27, 2007 6:37 am 
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The chip isnt a core, it is a full chip for sale with the 134 as core licensed from WDC.

It is used int he new generation of very low cost game consoles.
http://www.target.com/gp/detail.html/sr ... B00009VDXX
This would be a typical application of this chip.

http://www.target.com/gp/detail.html/sr ... B00029T4E2

Or this.

Very nice, the entire cpu, video and sound and io core in a single chip with only an external rom for the game.

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PostPosted: Fri Jul 27, 2007 7:18 am 
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The datasheet I saw for the chip indicates a 65816 is the core, not a 65134.

I can't fathom why anyone would want to continue to use a 6502 in any application like this when the 65816 offers, transistor for transistor and clock for clock, such a vastly superior capability.


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PostPosted: Fri Jul 27, 2007 10:02 pm 
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kc5tja wrote:
I can't fathom why anyone would want to continue to use a 6502 in any application like this when the 65816 offers, transistor for transistor and clock for clock, such a vastly superior capability.

Offhand, I can think of three possibilities why (generally speaking) a 65C02 might be used instead of a 65816.

1. I don't know if its less costly to license the 65C02 core than the 65816, but if it is, that would likely be a major factor, especially in high volume applications/products.

2. The 65816 ICs put the bank address on the data bus to keep the pin count down. If the 65816 core does the same, the 65C02 has the advantage that the data bus is free (without needing additional transceivers) for half the cycle.

3. The unused 65C02 opcodes are guaranteed 1 cycle NOPs, useful for applications requiring exact timing. All 65816 opcodes (including WDM) are 2 or more cycles.

None appear to be wildly compelling reasons to choose the 65C02 over the 65816, but #1 would seem to be the biggie (at least to me). I wouldn't think that #2 and #3 would be all that common.


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PostPosted: Sat Jul 28, 2007 12:13 am 
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My bad, I had 134 on the brain when I posted.

(good to be back in the WDC world, life has been vastly insane with my latest electronic project building a thereming and Donald Trump now involved :D

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