65Org16.x Dev. Board V1.1 using a Spartan 6 XC6SLX9-3TQG144

Topics relating to PALs, CPLDs, FPGAs, and other PLDs used for the support or creation of 65-family processors, both hardware and HDL.
ElEctric_EyE
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Joined: 02 Mar 2009
Location: OH, USA

Re: 65Org16.x Dev. Board V1.1 using a Spartan 6 XC6SLX9-3TQG

Post by ElEctric_EyE »

The setup was very precarious with a big fat cable fed to some tiny wirewrap wires which were soldered to the QFP on the Devboard, but I saw activity on HSYNC and the output of the red DAC. I gave up on blue and green outputs as the pins were too close together to solder more wires. VSYNC did not show anything, but I attributed that to an intermittent scope probe. I was doing this 'testing' while I was seeing the colorbar pattern on the USB capture on the monitors' HDMI input, which the CS4954 was outputting through S-video, so VSYNC had to be present.

I wouldn't be so unscientific in this testing if I were thinking of keeping this IC for V1.2. I really need a 800x480 resolution to match the TFT I am using, for V1.2 of the Devboard. This way, the software I write will be transportable between the 2 video outputs. The TFT is an input device as well, with its touchscreen capability. :wink:
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