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PostPosted: Mon Mar 26, 2018 7:58 am 
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I'm having trouble communicating with the ftdi rs232-ttl converter (5 pins) I'm using. The 5 pins are Vcc, Gnd, Rx, Tx, DTR and CTS.

Below is the connection from the usb ft232 to 65c51 chip. I've also grounded CTS pin on the 65c51 to enable the transmitter.

USB -> 65c51
Rx--->TxD
Tx--->RxD
DTR--->DSR
CTS--->GND


As for the software side,
I am aware of the Xmit bug in the latest 65c51 chip, and I'm following floobydust delay routine to get it working with my 1Mhz computer with 1.8432Mhz on the ACIA. The code is shown below..

Code:
                 .setcpu "65C02"

                 ACIA_DATA = $0000
                 ACIA_STATUS = $0001
                 ACIA_COMMAND = $0002
                 ACIA_CONTROL = $0003

                 .segment "VECTORS"

                 .word   nmi
                 .word   reset
                 .word   irq

                 .code

reset:           jmp main

nmi:             rti

irq:             rti

main:            ldx #$ff
                 txs
                 lda #$00
                 sta ACIA_STATUS
                 lda #%00011111            ;1 stop bit, 8 data bits, 19200 baud
                 sta ACIA_CONTROL
                 lda #%00001011            ;No parity, no echo, no interrupt
                 sta ACIA_COMMAND

loop:            lda #$2A ;Sending 2A
                 sta ACIA_DATA
                 jsr delay_6551
                 lda ACIA_STATUS
                 lda ACIA_DATA
                 jmp loop

delay_6551:      phy
                 phx
delay_loop:      ldy #1
minidly:         ldx #$68
delay_1:         dex
                 bne delay_1
                 dey
                 bne minidly
                 plx
                 ply
delay_done:      rts


Image

As for the wiring I'm following exactly with Grappendorf's connection http://www.grappendorf.net/projects/6502-home-computer/acia-serial-interface-hello-world.html, which inverts the A15 to choose between the upper 32k (ROM) lower 32k (ACIA) and the 2 LSB for register select as shown above. I'm still not getting any outputs on my terminal screen (putty), any help would be greatly appreciated.


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PostPosted: Mon Mar 26, 2018 11:26 am 
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If you're following the linked schematic completely, then the system does not include any RAM, correct? If this is the case, then you can't use any instructions which require the stack, such as PHX, PHY, PLX, PLY, JSR, RTS, etc. as there's no memory available. Note that these instructions will also affect the 65C51 due to it's incomplete addressing. Also, are you using a CMOS CPU? If not, then instructions such as PHX, PHY, PLX, PLY aren't valid.

If you do have some RAM in the system then hopefully you can provide a more accurate schematic and memory addressing decode.

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PostPosted: Mon Mar 26, 2018 11:47 am 
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floobydust wrote:
If you're following the linked schematic completely, then the system does not include any RAM, correct? If this is the case, then you can't use any instructions which require the stack, such as PHX, PHY, PLX, PLY, JSR, RTS, etc. as there's no memory available. Note that these instructions will also affect the 65C51 due to it's incomplete addressing. Also, are you using a CMOS CPU? If not, then instructions such as PHX, PHY, PLX, PLY aren't valid.

If you do have some RAM in the system then hopefully you can provide a more accurate schematic and memory addressing decode.


Oh gosh why I didn't think of that before, gahh.. I've been using instructions without having clear thought of what they're doing. For now, I'll try to work on the RAM and provide a much more clear address decoding and see if the current config work out. Thanks for the heads up! :D

and yes, they're the latest CMOS WDC 65C02.


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PostPosted: Mon Mar 26, 2018 6:45 pm 
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crepesmort wrote:
Image

Any chance of posting that in monochrome?

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PostPosted: Mon Mar 26, 2018 8:53 pm 
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Also, as you're using a WDC 65C02 processor, you need to tie BE to +5V as well. In general, I use a 3.3K resistor pack to tie the following lines high: BE, RDY, /SO, /IRQ, /NMI, /RES. Also, reference the datasheet for pinouts, as pin 1 on the WDC part is different than the NMOS (and other CMOS version) parts.

I also use a FTDI UART to USB interface module but prefer a 5-wire connection using RxD, TxD, RTS and CTS (plus ground). You can configure Putty or ExtraPutty to support the RTS/CTS handshaking which works fine.

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PostPosted: Thu Mar 29, 2018 6:21 am 
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Image

et voila! It works!

I was following the tutorial in the page linked very closely, but always had some doubt that the connection in the schematic doesn't go well with the logic it's going for (or at least, incomplete). So I re-arrange the whole board and follow Garth's 6502 tutorial along with the address decoding logic and it finally spits out the 'hello world' :D

I'm also planning to swap the current LS logic series with the HC ones sometime later. But one problem remains, I want the text to pop-up when I open the port connection, as it is right now I have to press enter first for the ftdi to read hello world.

Here's my current code:
Code:
                .setcpu "65C02"

                ACIA_DATA = $4400
                ACIA_STATUS = $4401
                ACIA_COMMAND = $4402
                ACIA_CONTROL = $4403

                .segment "VECTORS"

                .word   nmi
                .word   reset
                .word   irq

                .code

reset:          jmp main

nmi:            rti

irq:            rti

main:
init_acia:      lda #%00001011        ;No parity, no echo, no interrupt
                sta ACIA_COMMAND
                lda #%00011111        ;1 stop bit, 8 data bits, 19200 baud
                sta ACIA_CONTROL

write:          ldx #0
next_char:
wait_txd_empty: lda text,x
                beq read
                sta ACIA_DATA
                jsr delay_6551
                inx
                jmp next_char

read:
wait_rxd_full:  lda ACIA_STATUS
                and #$08
                beq wait_rxd_full
                lda ACIA_DATA
                jmp write

delay_6551:     phy
                phx
delay_loop:     ldy #1
minidly:        ldx #$68
delay_1:        dex
                bne delay_1
                dey
                bne minidly
                plx
                ply
delay_done:     rts

text:           .byte "Allo le Monde!", $0d, $0a, $00

Because I want to put some command line interface to handle the memory through the ACIA, any thoughts? Or this can't be done as there's no ACIA_STATUS to check if the transmit is ready with the xmit bug preventing that so the ft232 reads it as soon as it connects and we have to manually press enter for it to show again?

BigDumbDinosaur wrote:
Any chance of posting that in monochrome?

I don't think that'd be necessary anymore, I discarded the schematic altogether and follow Garth's tutorial instead.


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PostPosted: Thu Mar 29, 2018 1:10 pm 
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Posting in monochrome.. BDD asked as he has a hard time seeing colors, so it's much easier for him to provide some valuable feedback if he can read the schematic.

Getting some additional code working... if you want the board to power up and present a boot message to the Putty console, this is pretty simple. Just initialize the 6551 and send the boot up text string using the existing routines. I suspect you don't have a proper hardware configuration between the 6551 and FTDI adapter and/or a proper software config on either end. I suggest you wire it up as a 5-wire interface and configure Putty for RTS/CTS handshaking and configure the 6551 for this as well. For the interface wiring:

TxD <-> RxD
RxD <-> TxD
CTS <-> RTS
RTS <-> CTS
Gnd <-> Gnd

For the rest of the lines, (DTR, DSR, DCD) they can be connected together on each interface.

As you're using the WDC 65C51 you can use interrupt-driven receive but not transmit. The datasheet will give you the details on getting the rest of the chip configured.

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PostPosted: Sat Feb 27, 2021 8:00 am 
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I'm trying to do this also, and have been reading up. But I'm stuck on one question: what output voltages comes out of the 65C51 TxD, RxD, CTS, RTS pins? Is it 5v, 3.3v, TTL, RS-232?

The W65C51S manual doesn't answer this.

I ask as I'm about to buy one of these below but want to make sure it will work. In other words I'm trying to understand if I need a MAX232 chip inbetween the '51 chip and the ftdi adaptor or something else to ensure the voltage levels are compatible.

https://core-electronics.com.au/usb-ftdi-ttl-232-cable-ttl-232r-3-3v.html

https://core-electronics.com.au/ftdi-friend-extras-v1-0.html

Thanks (excuse typos and wording errors as I'm typing on my phone as home internet has dropped out)

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PostPosted: Sat Feb 27, 2021 8:23 am 
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Firefox6502 wrote:
I'm stuck on one question: what output voltages comes out of the 65C51 TxD, RxD, CTS, RTS pins? Is it 5v, 3.3v, TTL, RS-232?

The W65C51S manual doesn't answer this.

Since it's CMOS, the output high voltage will be nearly the Vcc (or VDD) voltage. The data sheet still says minimum 2.4V with a 4.75V Vcc, and with a very light (100µA) load; but I'm sure that's a carryover from the early NMOS days. I can't believe they haven't fixed that yet. Edit: Hmmm...Even my Rockwell, Synertek, and GTE books say 2.4V, and they're a lot better at their data sheets than WDC is!

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PostPosted: Sat Feb 27, 2021 8:24 am 
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Firefox6502 wrote:
I'm trying to do this also, and have been reading up. But I'm stuck on one question: what output voltages comes out of the 65C51 TxD, RxD, CTS, RTS pins? Is it 5v, 3.3v, TTL, RS-232?

The W65C51S manual doesn't answer this.

Sure it does. :D Read the DC characteristics section. I'll give you a hint. CMOS outputs (almost) swing rail-to-rail.

Quote:
In other words I'm trying to understand if I need a MAX232 chip inbetween the '51 chip and the ftdi adaptor or something else to ensure the voltage levels are compatible.

Again, the FTDI's data sheet is your friend. The MAX232 transceiver is used to adapt the TTL or CMOS levels coming out of or going into a UART to the levels called for by the TIA-232 standard. All of this stuff is documented in literally millions of web pages.

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PostPosted: Sat Feb 27, 2021 12:48 pm 
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Thanks GARTHWILSON and BDD. I've now looked up the DC Characteristics of both the 65C51 and the FTDI chips:

65C51
VOH MIN 2.4v
VOL MAX 0.4v

FTDI TTL-232-5V
VOH MIN 3.2v
VOL MAX 0.6

FTDI TTL-232-3V3
VOH MIN 2.2v
VOL MAX 0.6

Also thanks BDD for the lesson in "how to teach a man to fish". Using the datasheets specs, I also see that either version of a FTDI cable (5v vs 3.3v) voltage levels will work with the 65C51 CMOS output voltage levels.

So I'm going to buy this 5V FTDI cable as it's cheaper at $29.41:
https://core-electronics.com.au/ftdi-cable-5v.html

The 3v3 FTDI cable is $40.51, no thanks:
https://core-electronics.com.au/usb-ftdi-ttl-232-cable-ttl-232r-3-3v.html
And if I'm reading it correctly, this FTDI's logic 1 (VOH MIN 2.2v) may fly under the radar of 65C51's logic 1 (VOH MIN 2.4v) and not register. Unlikely but could happen.

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PostPosted: Sun Feb 28, 2021 10:46 am 
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Firefox6502 wrote:
And if I'm reading it correctly, this FTDI's logic 1 (VOH MIN 2.2v) may fly under the radar of 65C51's logic 1 (VOH MIN 2.4v) and not register. Unlikely but could happen.

Are you aware that the WDC 65C51 has a significant hardware bug? I don't recommend its use for anything, as it is a primitive design reflecting the state of the art in 1976. Increasingly, members who are designing and building new machines with serial I/O are opting for the 16550 (or derivatives) or the more advanced NXP 28L92.

If you decide to stick with the 65C51 you will not be able to run the transmitter in interrupt-driven mode and even straight polled mode won't work. You will have to introduce a timed delay after each datum is transmitted so you don't corrupt the data stream. The above linked topic goes into considerable discussion about this bug and various workarounds.

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PostPosted: Mon Mar 01, 2021 1:14 am 
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Thanks for the heads up BDD. I have read up on the 65C51 bug. In the last 2 weeks I had changed my mind several times on which way to go, use a: 65C51, or an NXP UART, or even implement SPI which will open up a world of other chips (including UARTs)!

Some history which will help show you where my mind is/was at... initially when I first started reading up and designing my SBC, my 2 main requirements were:
1. Use only available/in production chips, i.e. no NOS chips
2. Use only DIP chips

Now these rules may or may not make sense to some of you hardware guys. But my background is software (i.e. programming) only, and I haven't designed anything serious with electronics. Plus I learnt electronics back in '91. So I figured, keep my first SBC design simple and use only "through hole" components. There will be bugs I fear. And I will have to diagnose these with my weak electronics skills.

Recently encountering the 65C51 bug and reading up about it, then reading comments about the 65C51's archaic design and architecture had got me re-thinking my second rule. I swayed which way to go, and had decided to stick with the 65C51. But your post has got me re-thinking it all over again. And I do like the idea of using a modern and working UART chip. So I will overcome my fear of SMD components, and look into implementing SPI and having SMD components in my SBC.

I like Daryl's SPI interface so will go with this. And GARTHWILSON did mention using SPI and the MAX3100 UART chip.

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PostPosted: Mon Mar 01, 2021 1:31 am 
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Quote:
So I will overcome my fear of SMD components, and look into implementing SPI and having SMD components in my SBC.
Sometimes, such as when using wire wrap or a breadboard, it's nice to adapt SMD for use on a .1" grid. That's the approach I took here:

Breakout board for tiny 16is750 UART with SPI/I2L interface

-- Jeff


Attachments:
IMG_2564CrpCrv.JPG
IMG_2564CrpCrv.JPG [ 119.26 KiB | Viewed 1784 times ]

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PostPosted: Mon Mar 01, 2021 1:47 am 
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Firefox6502 wrote:
Thanks for the heads up BDD. I have read up on the 65C51 bug. In the last 2 weeks I had changed my mind several times on which way to go, use a: 65C51, or an NXP UART, or even implement SPI which will open up a world of other chips (including UARTs)!

Some history which will help show you where my mind is/was at... initially when I first started reading up and designing my SBC, my 2 main requirements were:
1. Use only available/in production chips, i.e. no NOS chips
2. Use only DIP chips

Now these rules may or may not make sense to some of you hardware guys. But my background is software (i.e. programming) only, and I haven't designed anything serious with electronics. Plus I learnt electronics back in '91. So I figured, keep my first SBC design simple and use only "through hole" components. There will be bugs I fear. And I will have to diagnose these with my weak electronics skills.

Recently encountering the 65C51 bug and reading up about it, then reading comments about the 65C51's archaic design and architecture had got me re-thinking my second rule. I swayed which way to go, and had decided to stick with the 65C51. But your post has got me re-thinking it all over again. And I do like the idea of using a modern and working UART chip. So I will overcome my fear of SMD components, and look into implementing SPI and having SMD components in my SBC.

I like Daryl's SPI interface so will go with this. And GARTHWILSON did mention using SPI and the MAX3100 UART chip.


I agree on not pursuing the recent W65C51 for obvious reasons (I found the bug initially). I actually have over a dozen of them in DIP and PLCC format, but there's really no value in them at this stage. If, for some reason, you still want to use one, try and locate an older Rockwell R65C51-P4... I have a small quantity of these and while they're rated at 4MHz, they appear to work okay at 5MHz, but no more.

If you want to with DIP parts, you can likely find some NXP SCC2691 UARTs... I used these on my last SBC and it's a great single channel UART and rock solid, albeit CPU clock speeds are only good to 6MHz. If you're like most of us, the SBC you're working on may be your first, but highly unlikely it will be your last. Once you have a working system, you'll find things you like about it and probably more things you don't like about it... and that will have you looking to build the next one... with different features, some different hardware bits and such. It just happens.

So, I'd still vote for a simple system... DIP parts are fine, CPU clock speed reasonable and use it as a learning experience for both hardware and software. If you start writing a fair amount of assembler code for it, you'll likely be able to move much of it to your next SBC. In short, don't overthink your first SBC... once you have one working, you'll certainly change your mind on what you would like as your next one :wink:

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