I tried to build, but didn't quite make it. I've contacted the owner of a fork on their Github issue. (Tragically, Andrew passed away earlier this month, so we will need third-party assistance. It would be great to have this project of his available as a runnable release.)

Oh my goodness, that's terrible. I had no idea. I've benefitted considerably from his work in both hardware and software, which he gave to the public so generously.

My condolences to his family and friends. A really sad loss to all of those who interacted with him here.

This is entirely unrelated to the topic of this thread, so perhaps you could repost your query as the start of a new thread? (I suggest copying the contents of your post here to a new post and editing the one here to point to it.)

I don't mind helping out with some answers, but there's likely to be a lot of back-and-forth that will not be of any interest at all to many readers of this thread.

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Curt J. Sampson - github.com/0cjs

I'm the owner of the fork. I will create a buildable version and a runnable release. Sorry to hear about Andrew. That is a terrible loss.

Not sure it's something everyone should be using, but personally i added some alternative instruction mnemonics to make them more readable.
specifically for INC, DEC, CL*, SE*, PH*, and PL*
examples:

can be turned into:

it's especially noticable with the NotePad++ highlighting i'm using for Assembly:

I also got the good old "ADD" and "SUB" Pseudo Instructions which assemble into "CLC ADC" and "SEC SBC" respectively.

and just for fun, and becuase i often hear people compare the Zeropage to a RISC CPU's Register File i added a bunch of RISC-like instructions that actually use the Zeropage as it's Register file. it also predefines some constants so you can use R0-R255 to refer to decimal 0-255, making the RISC Experience even more immersive!

maybe one day i'll make a 65C02 FPGA Core around this idea.

You mean like the .( and .) Block pseudo opcodes of xa65? Ca65 has similar functionality just can't remember right now the names

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

If your assembler does not supply them, define the following aliases:

BLO for BCC
BHS for LCS



is more obvious than

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

These are from the Motorola instruction sets.

BLT, BLE, BGT, BGE are for use after signed comparision.

BLO (LOwer), BLS (Lower or Same), BHI (Higher) and BHS (Higher or Same) are the unsigned counterparts.

MOS may not have adopted those out of "copyright" concerns.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

You still have the signed vs unsigned conundrum. Is GE signed or unsigned?

You can choose different phrases or add a suffix: GES and GEU

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I have created a release of the dev65 assembler that includes an installable binary. I've made it as easy as possible to install on Linux, Mac, and Windows. I wanted to support my Mac G4 but unfortunately this version requires Java 1.6 or greater. The current version of Java is Java 11. If you have that, you're good. Yes, Java version numbering is stupid. If you're still using Java 8, like so many companies are today, it's time to move on.

Download installer

If you have trouble, open an issue and I'll fix it.