I think you are right about Phoenix is a big DHL hub. Every one of my DHL packages from China went from LA to Phoenix and then to Albuquerque.

CPLD design is SO much easier if you use Altera Quartus for schematic or HDL and either program Altera CPLD directly or convert to Atmel programming format using pof2jed and programming ATF150x with Atmel programmer. I looked at Daryl's 65SPI PLD code in WinCUPL and thought "Wow, this is HEROIC! I'd gave up long time ago".

Bill

I can second that. I am using Quartus with Verilog on my 68000 build and it is very good and productive. I am using the EPM7128S for all the glue logic and SPI. Here's a picture of my build.



I got the SPI Master working last night driving a oled display.

Very nice!

I can also see 27C1024 PROM, 16C550 DUART, and 12MHz 68000. I can't make out the RAM. How fast is the processor running?

The QVGA screen is cheap now and it can be driven with SPI. SPI is quite useful for interfacing with modern I/O.

the sram is CY7C1049D. The cpu is running at 12Mhz (not try to overclock yet). That mandelbrot is C code with soft floating point math so a bit slow. Take around 1min 15sec to render.

Finally received the pc board last evening. The pc boards are well made. It is a 2-layer 2"x4" board; the design rule is 7 mil trace and 7 mil space and 7 mil annular ring for via. JLCPCB pretty much hit the bull's eye as shown in the first picture.

Build up two boards so I can experimenting. As built there are 223 solder joints so a board can easily be assembled under an hour. 2nd picture shows the finished board with major components annotated. The board in the picture is 8" long from tip of USB-serial adapter to end of CF disk.

They both work!

I'll update & finalize the CRC65 homepage. I'll be doing overclock experiments this weekend to find out its upper frequency limit.

Bill

First... Eddie, the 68K system looks really nice! Congrats on getting that one put together... I'm also waiting for F1 season to kick off!

Second, Bill, the new PCB and buildup looks great. You've managed this project very quickly... I did look at it last night on retrobrew. I've also managed to get Quartus 13.0 downloaded from Intel and installed in a Win7 VM... so hopefully I can start working with that for a future project.

So many projects, so little (free) time.

_________________
Regards, KM
https://github.com/floobydust

very nice and clean pcb. I also use JLCPCB for my boards, they are really good and cheap.

thanks, I've got lots to do on the 68k build yet. Full SPI support include OLED & SDCard. Then onto the Amiga chipset emulation.

At 24MHz the board is flaky, but it is running solidly at 22MHz from 4.75V to 5.25V. I have to remove I2C capability to run at 22MHz, but I think I can pare down the bootstrap software to restore I2C capability.


I'm retired, so I do have more free time, but I also have even more projects!

Bill

PS, My son is a big fan of F1. He had even written a suspense novel with F1 racing as the background.

I am a big F1 fan, do share the title of the novel.

The Crash to Black by Christopher Shen. It is on Amazon.

I retired about 18 months ago.... it's great! But now I have so many projects and irons in the fire, it's tough to figure out how I ever had time for a job! House projects, Car projects, Audio projects, Computer projects... Cycling, Cooking, Music... and keeping up with family and friends.

I try and schedule things to a point, so I go overboard but don't get too complacent, it's balancing act!

_________________
Regards, KM
https://github.com/floobydust

I have retired for 9 years now. It is scary how quickly time flew in retirement!

Built up 5 CRC65 to make sure the design is producible. I'll need several for experimentation anyway. One is set aside as the reference design at the nominal 14.7MHz; another is for overclock experiment; another as tester for whatever 6502 acquired on eBay; and one for general experimentation.

All 5 boards have been tested to 22MHz and passed. The CPLD design is completely full so in order to run at 22MHz I need to remove the I2C functionality. Even with that, I believe the CF write access is marginal. It will intermittently failed the write test but CF read is working fine. The important point of 22MHz operation is to prove sufficient design margin of which I'm satisfied. Nevertheless, I believe it is possible to simplify the boot ROM and apply the freed resources to restore I2C functionality and fix the CF write issue. Something to work on...

The CPLD is Altera's EPM7064SLC44 which is obsoleted part. Atmel has a Altera-to-Atmel converter, POF2JED, which should convert the Altera programming file to program Atmel's equivalent (ATF1504AS) I will put out an order to Mouser for few ATF1504AS and an Atmel programmer so I can check out the file conversion.
Bill

One of the boards will be the clock. I'll also find out how long a CRC65 can run continuously. The hand-wired RTC is not particularly accurate; it has gained about a minute since 9 days ago.