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PostPosted: Sun Mar 08, 2009 4:55 pm 
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ElEctric_EyE wrote:
... Do you have any experience with AS or ALS? or compatibility issues I may encounter? I would like to primarily use HC or HCT for the rest of circuit.


Sorry, I missed reading your last post on that thread Garth. Got too involved in the thread itself. You answered my last question before I asked it. Reading now...


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PostPosted: Sun Mar 08, 2009 9:00 pm 
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I had a similar problem when my chipcount started to grow on a certain project. It took me almost a year to figure out it was noise entering the circuit due to the fact that all the wires I used for VCC and GND were of the same thickness as the rest of the circuit.

Working with digital circuits that are fast for the size of the board, few people realize the effect of wires. If you have to use wire-wrap, you need to keep the connections as short and straight as practical, starting with putting the IC sockets next to each other with no room between them. Cram it all in as tight as possible. Especially when not against a ground plane, the size of the wires would make a pretty minimal impact. It would affect resistance at fast slew rates because of skin effect, but it would not have a significant effect on inductance, which is the main enemy. For that, you should have at least a ground plane, if not also a power plane. You can get perfboards for wire-wrap with planes on one or both sides. The best perfboard is pretty expensive, having two planes plus thru-plated holes; but you should at least go for a pad around each hole even if the hole is not thru-plated. That way you can solder the IC socket at least at the power and ground pins, also bringing through the hole for the power pin a strand of wire that's soldered to the power plane on the top of the board right next to the pin with not even .100" length, and soldering a .01µF chip capacitor from that power pin to the surrounding ground plane.

I say specifically a chip capacitor because that way there's no lead length on the capacitor. Leaded monolithic ceramic capacitors turn inductive at frequencies as low as 10MHz sometimes, and won't do you any good for bypassing in fast digital work. Soldering the chip capacitor on this way will get rid of as much inductance as possible in the power connection and its bypassing to ground. Having the pad to solder the pin to keeps the pin from moving and breaking the chip capacitor. The ground pin on the socket should have a connection less than .100" to the ground plane. You'll still have the inductance of the socket and the IC pins, but you will have done all you can about the things that have produced the most trouble so far.

In the mid-1980's I worked in applications engineering at a company that made VHF and UHF power transistors, so I do have some first-hand experience with what goes on at over a GHz. Back then, a lot of engineering students went into digital thinking they would avoid some of the analog complications; but as digital got faster and faster, it not only became analog, but the worst kind of analog-- RF! I have not worked in very high-speed digital, but have collected a lot of articles from Dr. Howard Johnson who is kind of an industry guru on high-speed digital design.

If you cannot use a perfboard with planes, it's good to have a power and ground distribution center in the middle, with a star arrangement, instead of, or in addition to, daisy-chaining power and ground wires.

I should mention that another area that bites novice digital engineers is bad clock-distribution schemes.

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Those were the days of LS TTL... I was looking at a 74F269 which max frequency was 100MHz. I think now 20MHz will provide enough resolution to measure pulse widths from 1ms to 100ms. The only other family of the 8-bit counter I need is AS. It's an 74AS869. Do you have any experience with AS or ALS?

I don't have any data on a 74<anything>869, but according to my data books, 74AC or ACT CMOS is faster than ALS.

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or compatibility issues I may encounter?

If you're connecting ALS outputs to CMOS inputs, you should probably use a CMOS family with the "T" in it, like 74ACT, not 74AC. (The "T" is for TTL input thresholds.) AN-314 in the links at the post I referenced above covers TTL-CMOS compatibility.

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Last edited by GARTHWILSON on Tue Jan 03, 2012 8:45 pm, edited 1 time in total.

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PostPosted: Mon Mar 09, 2009 6:30 pm 
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Very good info there. That should be a sticky on correct wire wrap procedures and bypass cap's. I myself don't fully understand the physics, but I guess the basic idea is, the inductance of the wires used to connect a bypass cap cancels out the capacitance (I.E. noise filtering) when "long" wires are used to make the connection? In the past, for typical LS logic I used .1uF caps wirewrapped underneath the board straight from the VCC to GND. On various sized IC's lengths from 1/2 to 1" total were used. Do you think lengths that small pose a problem when dealing with frequencies under 100MHz?


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PostPosted: Mon Mar 09, 2009 7:40 pm 
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Remember that digital circuits try to approximate square waves, which have odd harmonics reaching many times the base frequency. A 10MHz clock, then, will have harmonics at 30MHz, 50MHz, 70MHz, 90MHz, 110MHz, etc. all the way up to infinity assuming a perfect square wave. As you can see, 90MHz is the only the fourth harmonic of 10MHz, so even if you're using such a slow clock, you still can suffer from high-RF effects.

The problem becomes progressively worse the higher your clock frequency too. A 14MHz CPU will have harmonics at 42MHz, 70MHz, 98MHz, 126MHz, 154MHz, and 182MHz. All of those frequencies lies in the VHF spectrum (in fact, 98MHz is right in the broadcast FM band!).

Note how progressively worse this is compared to a simple 10MHz clock. 4MHz makes a huge difference!

Minimizing lead length also reduces B-field coupling between circuits, as well as minimizing capacitance. B-field coupling doesn't require resonant antennas to detect or transmit (were that the case, our transformers would be huge). Additionally, reducing the inductance has the benefit of also reducing the opposition to alternating current, which means your higher frequency energy propegates through the wire with less distortion. This will make for cleaner square waves and steeper signal slews, a mandatory requirement for the 65816's clock at the very least, and probably also the 6502 too, particularly since these parts are engineered as if they'll be running at 14MHz, even if you never do so yourself.


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PostPosted: Mon Mar 09, 2009 9:53 pm 
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I intend to take full advantage of the 14MHz bandwidth of the 65c02, especially since I will be using assembly. Now I would appreciate critiques of my design. Today I had the day off of work, so I started doing some memory addressing logic. I am starting a new thread, so you guys can help me with your expertise. I intend to share with the community, not trying to make a profit here. Since you guys share your knowledge, I will share what I know. I am going to call this project "The automotive fuel injection pulse width analyzer" and am starting a new thread. Most of my sketches will be scanned. See you there!


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PostPosted: Mon Mar 09, 2009 11:32 pm 
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I tried setting up an experiment to measure it where the rubber meets the road, but my cheap RF signal generator does not put out a strong enough signal at the frequencies of interest for my 'scope to be able to measure. (I didn't want to take the time to build an RF amplifier either, something I used to do for a living. The lab where I worked had $100,000 of RF test equipment per engineer in the mid-1980's, something I don't have at home.) My next idea was to look up (since I couldn't remember) the inductance of a straight piece of wire in my books. This seemed to be an illusive piece of info, so I did a web search for it, and found a wire inductance calculator at http://www.consultrsr.com/resources/eis/induct5.htm . [Edit, 4/3/14: That domain seems to have expired. There's another online wire inductance calculator at http://www.eeweb.com/toolbox/wire-inductance/.] I measured the lead diameter of a .1µF ceramic disc capacitor and got .022", then plugged that and 2" of wire into the calculator (2" being approximately the length across the corners of a 40-pin DIP), and got 52nH. Changing the wire diameter to that of 30-gauge wire-wrap wire changed the inductance from 52 to 60nH, which is not much difference for this application. 52nH resonates with a .1µF capacitor at only 2.2MHz, and with a .01µF capacitor at 7MHz, assuming the capacitor were perfect. Above the resonance of course, the impedance of the capacitor with those long leads rises quickly with increasing frequency, whereas ideally it would keep dropping. At 100MHz (which is definitely a frequency of interest for a 14MHz square wave), this piece of wire has 32 ohms of reactance. Putting that in your power or ground connection is terrible on an IC with fast output slew rates and which may switch states on many output bits at once and each of those is driving several capacitive loads. Unfortunately there's inductance also between the pins and the die of the IC. The 6502 in a PLCC package dramatically reduces that not only by having a smaller package with shorter internal connections, but more of them, two Vdd pins and three Vss pins.

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As you can see, 90MHz is the only the fourth harmonic of 10MHz

It's the fourth one with any power on a true square wave that's perfectly symetrical, but 90MHz is still called the 9th harmonic of 10MHz. Ideally for this application, the theory would be treated in the time domain and not the frequency domain, but a very basic understanding of circuit properties at the harmonics of interest is nevertheless helpful.

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What's an additional VIA among friends, anyhow?


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PostPosted: Tue Mar 10, 2009 4:20 am 
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Interesting; the amateur radio literature I've seen counts the number of harmonics, not the ordinal position of harmonics. Or, maybe I'm confusing it with music? Anyway, I think my point was taken. :)


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