joanlluch wrote:
I would still need an edge triggered J-K flip flop after that to obtain a proper 50% duty cycle (half frequency) signal, is this right?
What's important is meeting the timing requirements in the data sheet. WDC's 65c02 has only a minimum number of nanoseconds for each half of the cycle, whereas Rockwell's and others also have a maximum Φ2-low time. The latter is the reason for the fifth diagram on the 6502 primer's clock-generation page which allows you single cycle one of these other brands by using a pushbutton. Obviously then this will provide a horrendously
asymmetrical waveform, to keep the processor from failing at these ultra-low frequencies. As long as you're within the timing specifications, symmetry does not matter. You only need the symmetry if you're pushing the upper speed limit; and even then, I suspect that if you had a way to experiment and microadjust the Φ2-high and Φ2-low times independently of each other to find the maximum possible operating speed, you'd find they're not exactly equal. Without a way to do that, symmetry is your friend for maximum operating speed. For now, you seem to be interested in 10Hz and down, so don't worry about symmetry.
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