I got a video transmitter working on the FPGA using the Pynq's built-in HDMI port. Got a few simple programs to run. Some of the programs have odd results.

I tried to draw a pixel moving across the screen from left to right. Here is the part of the code that draws the pixel:



pixelAddrL,pixelAddrH contains the address of the pixel row. ballX is incremented every so often. But instead of moving from left to right, the pixel suddenly jumps several rows down and to the right whenever ballX is increased.

This made me think I miswired some address lines, so I tried to check. I found that if I nudge the wires with my finger, the '816 suddenly fails and goes into a brk-loop. This makes me think my setup isn't stable enough, and that might be what's causing odd behavior.

Remember that HDMI requires a license (if you want to sell this). VGA and Displayport are free.

My assembler was mishandling sta (pixelAddrL),y. I was using dj-on-github's py6502 (https://github.com/dj-on-github/py6502) because it ran smoothly in the Pynq's programming environment. Fixed the problem.

Now the pixel moves across the screen, but very fast. I'm going to have to implement a timer.

The '816 can now run programs!

https://youtu.be/Qlqry14JsGg

HELLO WORLD!

well done.

indeed well done!

have you implemented the full 24 bit address space?

I purchased a Spartan 6 FPGA board to play along with interfacing a 65c816 to some DDR3 memory. here's the link, https://www.aliexpress.com/item/1000006703110.html my interest is in building up a memory manager unit for the 816 along with including the common glue logic needed to multiplex the high order address bit for the processor.

What are you using the DDR3 for? Program memory or video memory?

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

I plan to use the DDR3 for general program memory, going to bootstrap the board by loading the RAM and using it for both RAM/ROM space.

I just looked at the board specs: it's got an LX25 on there, which has some 100kbyte of block RAM - enough for most 6502 retrocomputing purposes! And just £20.

It will be interesting to see how you get on with DDR3 - many projects use SRAM or PSRAM as the interface is much easier to deal with.

I went with DDR3 in preference to older technologies such as classic SRAM due to it's abundant availability, with such abundance affords in memory software projects that were once unimaginable can be realized. bragging rights aside I'd really like to see that classic hardware can do with access to 4+ Gigs of ram.

It would certainly be good to see SDRAM, or DDR{,2,3} running sweetly on a retro project. In fact I think SDRAM has been done - but the access time is quite lumpy, IIRC. These technologies are at their best doing cache-line refills, not random byte access. But in any case, they should work.

yes I am seeing that as I look into the matter more, it seems the best I may be able to do is bank switching segments of ram in/out of the internal ram in the FPGA.

edit- I am currently exploring the option of using the 100KB or so of memory in the FPGA use as SRAM and having that swapped into/out of the DDR3, it seems like a good compromise between what the 65c816 is accustomed to operate and how DDR3 is optimized for performance. the real question I have for myself is how messy things can get if I configure it for smaller page sizes and memory mapping.