Placing bypass capacitors

[BillO]

There seems to be as many opinions on this as there are people with opinions.

I think we can all agree that "as close as possible to the power pins" is a good idea. But in reality the power pins can be quite far apart or in really inconvenient places. Some people recommend closest to Vcc, other closest to Gnd. Others still suggest mid-way between them, but unfortunately the device in question gets in the way and bottom side placement is not always possible or a good idea.

My question here relates to through-hole designs, top layer placement. We can consider two cases:

A) 2 layer boards without power planes.

B) 4+ layer boars with power planes.

What say ye?

[Alarm Siren]

I was always told by the Technicians at university (who have like, 60 years experience between them) that you want to put the caps as close to GND as possible in order to reduce ground bounce, but I know that Garth has a differing opinion on the matter.

Honestly, I think if you have (good) power planes it honestly doesn't make much difference, since the impedance is already so low.

[hmn]

Here is a good video on the subject: Power Supply Decoupling & Filtering: why we use multiple caps in different locations (w2aew)

[GARTHWILSON]

Without any planes, just make the connection as short as possible. If the power and ground pins are on opposite corners (oh why oh why did they do that? How could it not have crossed their minds that logic would be getting a lot faster?!), the shortest route is diagonally, under the IC. It won't matter where the capacitor is along that diagonal connection, ie, whether the longer wire or trace is on the Vcc side or the ground side. However, the best is what is shown on this brochure's front page which I just now scanned from 1985, before SMT took hold:

It's pretty self-explanatory, so I'll leave it at that.

If you have only a ground plane and no power plane, put your bypass capacitor at the Vcc pin, getting the shortest possible connection from that pin to the ground plane. Dr. Howard Johnson had an article showing the results of experiments connecting the capacitors different ways; but although I used to give links to these, now unfortunately you have to pay to read them. [Edit: I found the archive: https://web.archive.org/web/20150709164 ... s/6_09.htm ] Anyway, as expected, the smallest capacitors gave the best results, ie, lowest inductance; for example an 0402 was better than an 0603 which was better than 0805 and so on (although 0402 is really too small to solder by hand). But then what one might not expect is that putting that pad with the via to the ground plane beside the capacitor is better than putting it off the end of the capacitor. If you're soldering by hand, you can put the via in the pad itself (but that causes production problems if the assembly is automated with screen printing of the solder paste).

If you have both a ground plane and a power plane, my understanding (again from Dr. Howard Johnson's writings about high-speed digital design) is that two infinite parallel planes have no inductance at all, so you really don't need bypass capacitors at every IC at all, that it's enough to have them only at one place on the board. You cannot of course have infinite planes in practice; but it's a close-enough approximation if you keep a margin around the edge, keeping traces and parts a little distance from the edge of the planes, say 0.2". That's hardly more than you might do if you were going to leave some room for card guides anyway, like if it were going into a card cage.

hmn's video is a good one. One thing I assume, although the narrator didn't specify, is that there is also a ground copper layer underneath the traces.