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CS_ROM is not gated by PHI2 like the other two are, I would suggest it probably should be. Also as it stands, it will be possible to write to the ROM chip - whilst this is fine, generally speaking the 28C' chips have specific requirements as to write cycles, its not like writing to RAM, so be careful you don't write to the ROM space when you don't mean to.
Oops, wiring R/W to the ROM /WE was entirely accidental, introduced when I switched the symbols in too much haste! Without the ability to write to the EEPROM in place, PHI2 gating of the /CS line shouldn't be necessary, right? The ROM is by far the slowest component to respond, and I wanted to give it as much time as possible, in case I am able to push the clock up a little on completion. It was mentioned that the UART will likely limit me to 3MHz, but even that would be a 50% increase in raw power, which would be neat...
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I would recommend a bulk capacitor - say 10uF - on your system power input.
Thanks. I wondered a little what to strap across the rails there. I'll add a nice big one.
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If all inputs have weak internal pull-ups as stated, why do DCD and RI need to be pulled connected to Vcc?
Haha, for no good reason, it appears. I think I must have connected them before finding the pull-up note in the data-sheet and neglected to re-visit.
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I feel like your PHI1/2 generator: I would be concerned about the ability of that circuit to drive PHI2 properly, and PHI1 will be a little out of phase with PHI2 due to the delay in the second inverter. Rather than rolling your own crystal circuit, it'd be much easier to chuck in a oscillator can. If you use a 4MHz can and divide it down to 2MHz with a 74HC74, you get a 50% duty cycle clock and you get both PHI1 and PHI2 for free, with no phase difference between them. You can even use the second flip-flop in a 74HC74 package to implement debounce for a reset or NMI button.
While a can sounds tempting, I do have a lot of bare crystals in a wide variety of frequencies already, so I would prefer to put them to use. But using a faster one and a flipflop would be a sensible move from the sounds of it. And debouncing using the spare unit is a great idea, thanks! That also reminds me that an NMI button for debugging lock-up crashes would be super useful.
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A suggestion: Have two USBs instead of three; one of them can do power and data. If you power it off a wall-wart then the data lines will do nothing anyway, and if you've plugged it into a PC chances are you want to power AND talk to it, so why use up two USB ports where one will do?
I thought about this. I guess I was a little worried about what the total power draw might be. I can use a decent wall wart, but laptop USB ports are - as I understand it - often somewhat under powered. That said, the unit doesn't have much in the way of useful IO besides a serial connection to a PC, so I will always be using it plugged in to one, and a single cable would be much more convenient!
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Other than that, it all looks good to me.
Woohoo! Thank you very much for looking over it.