Oh yeah, one more thing. How about 0 Ohm resistors? I always wondered why it wasn't just a wire there? I saw on stackexchange and/or other post-board that this was if the manufacturer wanted to put a jumper wire there or set some setting, in hardware. Or if they wanted to make one board for several different products, they could just remove the 0 Ohm resistor and put something else in. I dunno. Seems like I am missing something here. There was another explanation why they exist, but I can't remember.

If I go with 0603 (imperial), to be bulletproof, I will assume 0 Ohm will be that size too.

I kind of wish engineers would specify this stuff on the data sheets and/or shcematics, but I guess I can't expect a "roadmap" to scientific success. Need some elbow grease and a few long nights with a whiteboard.

One final message here. But no time today. Just mentioning that my earlier messages in this thread mentioned the LT3080, which I might now avoid. I think I will use a regular old linear regulator (LMXXX ? i forget the number right now.).

They seem likem really standard elements in many designs. I don't think I need anything fancy.

I did need a little bit of "community-supported common sense" ona a simple matter of ohms law/kirchoffs laws.

I figure linear regulators are ICs, right? True. Invented by Bob Widlar? True. Give a constant voltage, for loads that are inbetween a certain range? True.

Now call me old-fashioned, call me a biologist, and call me out-of-my-element. Guilty as charged! But, I don't like calling a current a "load". I know it is a "sjorthand" a "lingo" that EEs and experimenters use, but it bothers me. I was taught that a load was a resistance to the flow of current.

Now, I understand, electricity has grown up since the 1880s-1930s period, and now "active devices" rule the game. But I still prefer the old terminology. I prefer--sometimes--to thnk of an IC as a "lumped element" of one resistance, a variable resistance, depending upon what the chip is doing at that particular moment.

Is there any reason for me to stop thinking about the changing resistance of the 1,000,000-or-so transistors, and start thinking about the current flowing through them? Its the same thing, only backwards, and upside-down? Ohms law. With a good voltage regulator garaunteeing 3.3V (or whatever), the voltage regulator will supply more or less current, depending upon the RESISTANCE THE IC SHOWS IT. Right?

Please correct me if I am wrong.

And one last little item. If a voltage regulator says 3.3V and 5A, that just means 5 A maximum, right? I mean, if the circuit I hook it to, only draws 3A, than the regulator will only give three, right?

I feel foolish even asking, but all the stuff I read about linear regulators is "fancy" stuff, like "do you want an LDO", or "this is why a lin. reg. is different from a switching pow supply". Good info, but I couldn't get a straight, common sense answer.

Maybe its me? Fish out of water? Marine Biologist off the docks?

Zero-ohm resistors are indeed used to select options at stuffing time; but they're also easier for the assembly equipment to handle than a plain wire is. For just a few hard-to-route signals, it might be cheaper to use a few zero-ohm resistors than adding more copper layers to the PC board. This was especially true 30+ years ago and when parts were still all thru-hole—although I do remember single-sided phenolic boards with a bazillion jumper wires on them as if stitched, and I wondered why they bothered.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

The LT3080 at first appears to be a low dropout (LDO) regulator, but it doesn't do it the normal way which can make stability a bit more of a challenge. Instead, they have two supply voltage inputs, and the only way to get LDO on the main one is to have the second one at a higher voltage. I think you'll be better off with the LM7805 and related regulators. They're very easy to use, tough, and cheap.


Loads normally have resistance, but so do power sources and signal sources.


It may show reactance too, depending on the IC's load.


Yes, it's the maximum for the specified conditions.


Low dropout (LDO) is for when you need one that can work with the input hardly any higher than the output. The way these normally work requires a configuration that's different from how non-LDO linear regulators work, and they can be harder to keep stable. The data sheet gives instructions that will usually work to keep it stable if you do exactly what they say.

Switching power supplies are usually much more efficient with heavy loads than linear regulators are. Unfortunately the required quality of PCB layout is beyond the capability of most hobbyists, and the result is poor behavior, generating a lot of electrical noise, including at much lower frequencies than the switching frequency. For example, the switching frequency may be 175kHz, but you may get a lot of noise in the audio band as well, from pulses whose width is all over the place, very inconsistent from one pulse to the next, and skipping pulses. It may also be radiating a lot of noise, and interfere with nearby radio communications or even audio circuitry.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Good point. Somewhere in my poor old brain, I know this. Sophomore Chem 101 and 102 (and probably in high school, too!); the internal resistance within electrochemical cells.
Boy its been a little while since I thought much about that. For a short time after college, I almost thought of re-purposing my life towards something the "people' and/or "market" KNOWS that they want (and, consequently, will pay for research), i.e. battery science. A week or so studying the particulars, and I realized I had neither the background in metallurgy, nor the inclination to get up to speed. Instead, I cross my fingers and hope for better, cheaper, low maintanence, more efficient batteries, for solar storage.

I NEVER had a course in signal science. This has been an admitted deficiency in my education. I have patched it with some of my father's off-hand comments about being a "copper dinosaur" (fixed "one-dot-fives" for "The Phone Company" circa 1985-2000). The company would periodically send him for training so "The Switch" (i.e. copper pairs, to-the-home) could interface with the new (erbium-doped? I presume) long distance fiber optic lines.

Recently have thought about ladder line, twisted pair, single wire earth return, and all the history of it. I read somewhere that ladder line still has the highest velocity factor, I mean, besides wireless, which, obviously, must travel near the speed of light.

But a good point. I will have to think about that some more. "signals have resistance"... hmmmm? Might be time to break out my old physics book and look at the capacitive reactance and inductive reactance equations again? Impedance and etc.? Yup. I think I will do that today. Thanks again.

One final point, on my post above. I believe USB and SATA are based on "ladder-line-like" arrangements. So I guess, my study of history is sort of "paying-off", since SATA has just evolved out of PATA in the past 15 or 20 years, and USB, along similar lines, has grown into a mature technology.

I wonder if thunderbolt or lightning (or whatever the "new tech" is called?) will convince me to learn more and change my designs (as inchoate and nebulous as my designs might be!).

For awhile I often confused "differential pair" with "twisted pair". I am just now "vocalizing" my knowledge that twisted pair can carry differential signals, but , since it was an earlier telephone company invention, logically, HAD to be able to carry analog signals. I suspect all the twisted pair have all been digitized by now?

One final, final note. While "shopping for chips" (which is sometimes a ridiculous thing for me to do, because I am alternately, a "babe in the wilderness" and a "kid in a candy shop"), I saw a bunch of acronyms, like LTVS, LVCMOS, LVDS, etc. I suppose I should look them up again and give a comprehensive list of what I am talking about, but, for now, just know that I think about what these things mean for my design, especially with reference to bus switches and counters and such. An important sapect that I should not forget to study, in detail.

Not to "pick nits" or try your patience, as it has been ample and generous, thus far, but :



The "It" in your quote, is the the same IC in your quote "IC's load"? Right?

I'll re-state my question, more precisely and clearly below (I think?).

So, an IC, that I view as a "lumped element resistance", will show capacitive reactance (in lumped element fashion? I mean, as an aggregate value of all capacitance within said chip?), depending upon what loads that the aforementioned IC will drive (i.e. depending upon how much current this first IC sends/"allows" to other ICs and components, downstream)?

Is this correct? I hope I stated the question clearly? I might have confused myself just trying to put the question into words! Thanks again!

(If the answer is "it depends", you can just write that. The question was somewhat vague to begin with, and, I am sure, any answer would be highly specific to the nature of the circuit in question. since no example was offerred, "it depends" is an excellent and succinct answer. Then I will go "do my homework".).

That is what I heard about switching supplies. Hard to do well, but efficient, in terms of power consumed. I have also heard from audio-philes, that the supply is inherently noisy, even if done well. I have no experience to tell if thats true, but it is enough, being a beginner, to not "ask for problems". I will be less efficient, until such day as I am able to competently implement efficiency.

About Garth's reactance comment. I think you (Randall) said: mostly I think of chips as resistors. And Garth said: but they are not always quite like resistors.

Both of those are reasonable and correct! It depends on what level of detail you're looking at. No wire is a perfect conductor, and no passive component is a perfect resistor or capacitor. Any time current flows, you'll find that voltage drops, due to resistance. And any time current flow changes, you'll find a voltage developing, due to inductance.

Over a timescale of seconds or longer, a chip is a resistor. Over a timescale of microseconds, it exhibits capacitance. And over a timescale of nanoseconds, it exhibits inductance. (I just made that up, but I think it might capture something useful.)

On regular computer now... slower ... than ... death .... Maybe .... I move .... to ... Himalayas ... and send..... via ... smoke signals.... morse code.... next time .... here ... be pictures... so ... Geneartion Y and millennials ... can ... understand ....



Still no image... I am going to have to travel ten miles to get to a goddamn functional computer that is hooked to the internet, just to make myself unsderstood. sorry guys. But I KNOW computers, and there is no excuse for this poverty of functional equipment. Budget cuts, for 20 years? Either that, or purposeful hacking? paranoia? maybe ....Maybe I will take the bus, waste a whole day just tryiong to say one little thing about human eyes, image sensors, and functional models?

Twelfth times a charm ?

A Ha! Easy Peasey Japon-esey ... Voila!

Rudimentary sketch. I have done more, but had to run off and see the kid got on the bus this morning. First day back to school, and he is old enough to notice if I'm not there. Speaking of, now that I am done screaming at the computer, I must run to see that he gets a snack when he gets off the bus!

OK, just a quick post explaining the inadequacies of my previous post/schematics.

Of course, obviously, no power or clock sigs, yet, as my brain has yet to solidify around any solutions. I think one or two good, standard linear regulator ICs, should do the trick.

Clocks are easy for the FT600 and AL460; just a GOFXTAL (Good Old Fashioned XTAL). KAC uses a funky discontinued Cypress PLL fanout/thingy, but they have a replacement part on their website. I'll probably not rock the boat and just use their recommended thing.

No control signals yet? You see the fuzziness of my brain on the FIFO to FIFO-USB interface. Also, note that the 6502/65816 in the schematic is one or the other. I happen to own an '816, but would probably purchase '02 for the project (or just use the Z-80 some guy just gave me). I dunno.

And, on the other diagram, the colorful one, please note that things are approximate scale; approximately scaled to the KAC. That's about it, for now.

OK, there shouldn't be too many more postings here, for awhile. I think I got most of my initial (electronics) design roughed out, and most of the remaining work can be done by me. Thanks for all your help.

Unfortunately, it will NEVER function as I had hoped it would. Maybe it will. But I think not. The off-the-shelf imagers have a cover glass over each one, and might stymie my efforts to interface with a customized lens.

For now, I should go and try to build/design the customized lens, anyway (sort of abandoned my efforts to do so, back in 2008, and again in 2011. Not for lack of success, but for lack of a curved imager to "co-design" it with).

I consider the above schematic to be enough of a "proof of concept" that I can try to solve other problems associated with anthropomorphic cameras. Of course, I will still build it, I just won't obsess about prooving it or obsess about back-of-the-envelope calculations and such!

So, one more post; Lately some folks have been doing the research I want to do. Earliest curved imagers I am aware of are from Burke's 1991 study of focal plane arrays. I just downloaded his entire bibliography from that paper, to see if there is "prior art". The patent literature I have looked at suggest, no. Earliest curved imager patent, that I know of, is from early 2000s, an Agilent patent application that appears to still be pending? Sort of funny, since late 2000s and early 2010s sees a bunch of patents popping up on the subject, from all the big players, google, nikon, apple, etc. Maybe the japanese patents got the ball rolling here in the US? Maybe it was patent trolls, and maybe it was fast tracked in the US office, in order to compete globally? Why "the shaft" for the agilent patent? Maybe agilent didn't care, or forgot? I dunno. I shouldn't spectulate.

Here is the list of relevant study items (omitting patents; That list is in disarray, right now! Maybe an organized one will follow soon, but it is not a priority of mine to compile such a list).

1. "The optical advantages of curved focal plane arrays", Rim, Catrysse, Dinyari, Huang and Peumans* ; Stanford ; 31 March 2008 / Vol. 16, No. 7 / OPTICS EXPRESS 4965

2.Panoramic monocentric imaging using fiber-coupled focal planes", Stamenov, Arianpour, Olivas, Agurok, Johnson, Stack, Morrison, Ford; University of California San Diego, Distant Focus Corporation (Champaign, IL); 29 Dec 2014 | Vol. 22, No. 26 | DOI:10.1364/OE.22.031708 | OPTICS EXPRESS 31708

3. "Flexible focal plane arrays for UVOIR wide field instrumentation" Hugot, Jahn, Chambion, Moulin, Nikitushkina, Gaschet, Henry, Getin, Ferrari, Gaeremynck; Aix Marseille Université, Univ. Grenoble Alpes ; 2016, SPIE proceeding on Astronomical Telescopes and Instrumentation

4.Development and application of spherically curved charge-coupled device imagers; Gregory, Smith, Pearce, Lambour, Shah, Clark, Warner, Osgood III, Woods, DeCew, Forman, Mendenhall, DeFranzo, Dolat, Loomis; MIT/Lincoln Laboratory, US Army Natick Soldier Research, Development, and Eng. ; pgs. 3072-??? ; APPLIED OPTICS / Vol. 54, No. 10 / 1 April 2015

5. "Optimization of two-glass monocentric lenses for compact panoramic imagers: general aberration analysis and specific designs"
Stamenov, Agurok, and Ford; University of California San Diego ; pgs. 7648-??? ; APPLIED OPTICS / Vol. 51, No. 31 / 1 November 2012

6. "Optical analysis of miniature lenses with curved imaging surfaces" RESHIDKO AND SASIAN; The University of Arizona; Vol. 54, No. 28 / October 1 2015 / Applied Optics

7. "Highly curved image sensors: a practical approach for improved optical performance" ; GUENTER, JOSHI, STOAKLEY, KEEFE, GEARY, FREEMAN, HUNDLEY, PATTERSON, HAMMON, HERRERA, SHERMAN, NOWAK, SCHUBERT, BREWER, YANG, MOTT, MCKNIGHT2; Microsoft Corporation, HRL Laboratories ; Vol. 25, No. 12 | 12 Jun 2017 | OPTICS EXPRESS 13010

8. "Design and fabrication of silicon-tessellated structures for monocentric imagers" ; Wu, Hamann, Ceballos, Chang, Solgaard and Howe ; Microsystems & Nanoengineering (2016) 2, 16019; Stanford

9."Tunable curvature of large visible CMOS image sensors: Towards new optical functions and system miniaturization" ; B.Chambion, L.Nikitushkina, Y.Gaeremynck, W.Jahn, E.Hugot, G.Moulin, S.Getin, A.Vandeneynde, D.Henry ; Univ. Grenoble Alpes; Aix Marseilles Universitie ; Conference Paper · May 2016


These and (maybe four more?) are the best I can find, so far. I have not read them all yet. I have collected some more that I have not even worked into the list yet. Coming soon? Maybe revise the list later? I dunno. No time, as usual.


1. Iwert,O., Ouellette,D., Lesser,M., Delabre,B., First results from a novel curving process for large area
scientific imagers, SPIE 8453-68, 2012
2. Swain,P., Channin,D., Taylor,G., Lipp,S., Mark,D., Curved CCD’s and Their Application with Astronomical
Telescopes and Stereo Panoramic Cameras, Optical and Infrared Detectors for Astronomy, Proc. of SPIE Vol.
5499, SPIE, Bellingham, WA, 2004
3. Dinyari,R., Rim,S.B., Huang,K., Catrysse,P.B., and Peumans,P.,Curving monolithic silicon for nonplanar focal
plane array applications, Appl. Phys. Lett. 92, 091114, 2008
4. Woods,D.F., Shah,R.Y., Johnson,J.A., Szabo,A., Pearce,E.C., Lambour,R.L., Faccenda,W.J., Space
Surveillance Telescope: focus and alignment of a three mirror telescope, Opt. Eng. 52 (5), 053604, May 07,
2013

And, of course, that patent by William? Hicks, back in the 1960s, for a "fiber optic field flattener", while working for American Optical Company (CIA? Maybe. Gov't contract; see Jeff Hecht's book "City of Lights" for details... )

And, of course, on the subject of field flatteners, one might consult Rudolf Kingslake's "History fo the Photographic Lens" or Petzval's biography (if you know czech, hungarian, or german?).

Cheers, All!

P.S. Also, on ethe subject of log polar imagers, I point to the Jan Van der Spiegel and Sandini et. al., 1989 publication within (editor) carver mead's "Analog VLSI; Neural Networks" book. Also, I point to Travers work summarizing research on the subject. ( Traver and Bernardino ; Rob. and Aut. Syst.. 58 (2010); 378-398 )

How could I have forgotten Jim Janesick's "Scientific Charge Coupled Devices"? Copyright, 2001. An Exellent introduction to the science and history of imagers, image sensors, and digital cameras (excellent if you are marginally inclined towards science or electronics). It took a fair amount of sleuthing, i.e. tracking down and reading bibliographic items, but this work is a pretty comprehensive and very interesting look at the dawning age of image sensors. Even for a moderately scientifically, engineering inclined mind, like my own, one must read several chapters twice, and I learn new things everytime I return to read the book again (including yesterday!).

And why should one return and read said book? Well, for instance, in two years, on October 19, 2019, it will be the 50th anniversary of the image sensor (or, rather CCD, originally conceived as an electronic-delay type memory; Boyle and SMith of Bell Labs). But even more relevant to the "NOW" moment, is the impending doom of the Cassini probe, as it plunges into Saturn, sometime near Septemebr 15th, 2017. Unfortunately, there will be no observable "fireworks" like Schoemaker-Levy (circa 1998-2000? ; the "Jupiter fireball"), or the solar eclipse of last week, but I WILL KNOW, and that is all that matter. You will know too, now that you have read this post. And, FYI, Janesick helped create the Cassini imagers, thus my extended digresson on things, not-6502 ...

I bought that book circa 2005-2006, when it was fairly new (and specialized, expensive knowledge!). I was working at a cheese factory, which, of course, was more suited to my Marine Biology degree than was any other "real job" I have had. However, itt cost me a week's paycheck, and then I was so busy working 40-55 hour weeks, that I didn't have time to read it. Eventually I quit, sinceI dreamed of Strong AI, and not so much of cheese. Besides, companies and bosses like HAPPY employees, not miserable, underappreciated, underutilized ones.

Circa 2006-2007 I tried the assembly line at IBM. I ran the rapid thermal anneeal machine, which "baked the cookies". My robot worked pretty hard, and I stood around alot and made sure it did the job correctly. All those little p an n junctions had to be annealed, "re-organized", "not-quite-melted", so that the germaniium or arsenic or boron or phosphorous atoms would align properly in the damaged crystal lattice of the hyper-pure SIlicon crystal. THAT was a neat-o job, but STILL WAS NOT MAKING STRONG AI!

Hence, my bothering your 6502-oriented forum, these 5-to-7-years later! (But you KNOW it has been fun, despite my wordiness and foolishness!).