No, there are still parallel or lets say pseudo-parallel interfaces, there are also limitations for serial links. E.g. G.SHDSLbis bonding or LX4 or 1000BaseTX

Here's a video on some aspects of high-speed digital circuits, specifically edge-rates, ringing, and termination, by Jack Ganssle, which kicks off by recommending a book, High Speed Digital Design by Johnson and Graham. Even secondhand, it's nearly £20, so it must be in demand.

I Only Probed the Board With a Scope - Why Did My Board Crash?



Also see Jack's newsletter "The Embedded Muse": archives at http://www.ganssle.com/tem-back.htm

(via this Hackaday post)

Edit: from the comments on that Hackaday post, see also the Tutorial section starting on page 15 of this application note: http://cds.linear.com/docs/en/applicati ... an47fa.pdf

Edit: also from the comments, a recommendation for the book "Right the first time" by Lee W. Ritchey, which is now a legitimate pdf download (signup required) at http://www.thehighspeeddesignbook.com/download.php

_________________
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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Nice index, thanks! I found this high-voltage visual demonstration of return current:
http://www.sigcon.com/Pubs/news/8_08.htm

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Pardon the pun, but the demonstration was truly electrifying—more like "electrifrying" if you get in the way of that 150 kvolts.

Joking aside, thanks for posting the link. Very interesting.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I'm pretty sure the Aries device in Garth's photo is just a rather specialized wire-wrap socket mated to an ordinary, solder-tail PLCC socket and sold as a single product. It looks pretty good. But in case the price & availability don't suit you there are alternatives. Here again (below) is an ordinary, solder-tail PLCC socket, plus some plate-through PCB proto-board and two different styles of pins."Plan A" (below) is to use machined socket pins similar to those in the Aries product. These ones are 0038-3-17-15-30-27-02-0 from Mill-Max Manufacturing. They're a bit pricey but cheaper overall, I expect, than an Aries socket, especially if you buy the Mill-Max in quantity. You may want to stock up anyway, given that the same pins can mate with a lot of different stuff (including various sizes of PLCC sockets)."Plan B" (below) is to use plain pins, carefully wedged into the same holes occupied by the solder-tail pins of the PLCC socket. It's tight, but you should be OK as long as you pay attention to the rectangular cross-section of the solder-tails. The final step is soldering, but for the photo session I didn't do that.
I have yet to use these ideas on a real project but they look fairly workable as long as you take your time and use a fine-tip soldering iron. In particular, you'll want to plan the sequence so the inner rows' pins get installed and soldered before they're blocked by the outer rows. Also plan your connections to Gnd, Vcc and especially the bypass caps.

Be sure to use proto-board whose holes are plated through, as they offer better solder adhesion and thus more mechanical support. You don't want any pins twisting off during the wrap process. That could be tricky to fix if the neighboring pins are already wrapped and the region is congested with wire.


Finally, here's a top view of Plan B -- but what I want to draw attention to is the power plane surrounding the plate-through holes. Because there's no solder mask, the entire surface is susceptible to accidental shorts. All it takes is an errant shard of wire-warp wire or a tiny spatter of solder.

If your luck is bad, such a particle could lodge itself invisibly underneath the PLCC socket or some other component, and it would be impossible to detect and fix. I'm not a worrier by nature but I am uncomfortable with a power plane on the top (component side). The board in the photos is from Twin Industries, and they offer a double-sided power plane version as well. But I'll settle for a ground plane on the wiring side (bottom) only, where gravity isn't attracting debris, and where you have a better chance of seeing & correcting any trouble.

cheers,
Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Right. And if you really wanna do it right, don't use a socket. The tines add 5 mm or more to the circuit path, as compared to a PLCC soldered directly to the board. (But of course with no socket it'll a hassle replacing that chip, so be extra careful to avoid ESD and other forms of damage.)

Hmmm, this is illustrated in some doc for one of my projects presently in the Skunk Works. Might as well share that here.

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Attached is a white paper by Cypress Semiconductor that discusses various aspects of good system board design, especially as related to bypassing components and the effects of internal ground and power layers. Although Cypress' main product is static RAM of various types, the paper is applicable to all aspects of digital design.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Although my take on getting speed out of a digital circuit has more to do with design than hardware, it may be of some use!

In several recent projects that generate VGA from logic components, propagation delay became the limiting factor. Using 10ns SRAM and all 74HC logic, my propagation delays ranged from 10ns (74HC245 Buffer) to just under 20ns (74HC574 setup time).

So with a clock speed of 25.175MHz for standard 640x480 VGA, this mean that on every single clock cycle, the complete path from counter to output could not exceed 39 nanoseconds. Now this is a far stretch for a circuit built out of noting but 7400 logic chips that needs to address half a meg of SRAM, keep track of the address, send it through a switch, and then output it to an R2R DAC with all sync signals included!

When I lay out a design like this, I think in terms of propagation delay and then choose the appropriate IC for the job. Knowing that 3 chained 74HC193 counters will require about 20ns of time, this leaves only 19ns of time (39-20). Now subtract the 10ns output time for the SRAM and I am left with only 9ns, which is not enough time for the signal to propagate through the next 2 buffers (74HC574).

So now what?... give up and do another FPGA design? Get a Raspberry PI? .... no way, just throw more silicon at it!

My magic trick is to add a register to the signal path everytime I exceed the maximum allowed propagation delay.
I like to use the 74HC574 (8-bit positive-edge triggered D-type flip-flop) to hold back my data one clock cycle.
So now the 574 captures the signal at the 19ns mark, which is just within its 18ns required setup time.

On the next clock cycle, the 574 releases its data at a rate of 16ns, so now I can continue my propagation count.
With 2 more buffers ahead of the signal, each requiring 16ns, I still can't send the signal all the way to the DAC.
No problem, just toss in another 574 to capture the signal and then send it out on the third clock cycle.

By adding 2 more register levels, I am now able to keep the worst case scenario to 34ns, which is under the 39ns maximum.
This system has worked well for many of my designs, which often push up to 40MHz on a breadboard.
In my FPGA designs, adding "another register level" can also be a cure for accessing external devices that can't keep up.

So that's my 2 nanoseconds worth of advice for the High Speed Thread!
If you can't get the signal there in time, give it a break until the next clock pulse.

And as for bread-boaring High Speed Logic... don't let anyone tell you that 40MHz is impossible!

Cheer,
Radical Brad

What about exotic physics-based ideas? Would cooling such a device to below-zero temps, using ecl, asynchronous logic, or 3d printing a cpu so components can be placed directly above/below each other and therefore get much closer to each other increase speed significantly?

Certainly you can get more speed if you apply cooling. Indeed, you don't even need the cooling - if you know your chip temperatures won't go too high then they will run faster than worst-case, and the specs are always worst-case.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?