I attempted to find another PIC with the PMP peripheral and a built-in 7.37 MHz oscillator instead of the 8 MHz the PIC24FJ32 comes with. If such a part existed, it should simplify operation at higher baud rates. The PIC has a baud-rate generator built in. It can run either 4x or 16x the actual baud rate, and operates by dividing down the master oscillator with a counter. If you do the math, you find that in order to hit the higher baud rates without a large timing error, you need to run the system at a clock frequency which is an integer multiple of your fastest baud rates. Unfortunately, no such part seems to exist based on searches I did using the PIC selector tool:
http://www.microchip.com/maps/Microcontroller.aspx.
I'm currently running the PIC24FJ32 at an internal clock frequency of 8 MHz which is then multiplied by four by the on-board PLL for a final clock frequency of 32 MHz. Incidentally, most instructions execute in 2 clock cycles so that gives us 16 MIPS (16-bit) to work with (interrupt latency is fixed at 4 instruction cycles -- 8 clock cycles). But with a clock frequency of 32 MHz, the baud rate generator works in units of 4/32 MHz (125 nS) which leads to large timing errors at baud rates above about 230400 baud.
One way around this limitation would be to use an external oscillator. In their infinite wisdom, Microchip chose to use one of the two pins to which you would connect an external crystal or resonator as one of the PMP address lines on the 28-pin DIP part I'm using. If you switch to the 44-pin QFN or TQFP this problem goes away, but is replaced by a new one of how to mount it on a breadboard. That may not be an issue for other people building PC boards, but I do want a solution that is breadboard friendly as well. Another option, which exists for both the DIP version and the larger QFN/TQFP versions is to use an external oscillator since the OSCIN pin is not used for anything else on the part. This is the avenue I will go down as soon as I have the basic version working with the built-in RC oscillator.
The 6850 UART assumes that the user provides a reference clock which is either 1x, 16x, or 64x the baud rate being used. This severely limits the users choice of baud rates unless he wants to build some additional hardware to divide the reference clock to the many different values potentially required by the user. I have been thinking about how to work around this and maintain software compatibility with the chip and have come up with the following idea. The 6850 only requires a single address line to access its functionality but I have two available. I can add up to two additional registers to augment its operation. I was thinking of either providing a table of baud rates from which the user could select, or alternatively allowing the user to specify the 16-bit clock divisor directly into these two registers which will allow him to select any baud rate he wishes, standard or not. Since the possibility of allowing an external clock is now on the table, I think the latter choice will be the better one.
So, in summary, with an external 7.37 MHz oscillator (other values could be used but may impact the performance of the PIC adversely), it should be no problem reaching the maximum supported baud rate of approximately 1 Mbps with the PIC (perhaps it will even go as high as Fosc/4, though the specs say 1 Mbps).
I intend to get the PIC working in 6850 mode initially (with the augmentation discussed above), and then tackle the 6551 emulation. I foresee some problems with the 6551 because the PIC is incapable of supporting some of the modes the 6551 supports -- such as 5-bit and 6-bit modes, and 1.5-bit stop bit modes. However, these modes are rarely used so I don't think the average user will be affected. In addition, I need to figure out how to augment the 6551 with provision for selecting the baud rate (beyond the rates available by default) so that will take some more thought as well. I suspect I can steal another bit for the baud rate table that would otherwise have been used to select a word length of 5 or 6-bits but figured it was worth hearing from others before I commit to anything.
Speaking of FIFOs, the PIC has built in 4-byte input and output FIFOs which are fixed and used transparently by the hardware. Additional buffering could be added, but we need to make sure it is worthwhile. Given that each bus transaction to the PIC-UART will generate an interrupt on the PIC, there is going to be a limit on the maximum number of these bus transactions per second. If the interrupt routine is carefully optimized, I imagine that it may be possible to approach 1 MTPS, though certainly that number will decrease somewhat if additional buffering is added. Anyway, this is one of those bridges we can cross when we get there. The source code will be open-source so anyone can enhance or customize it as they see fit.
Spec sheet for the PIC24FJ part I'm using:
http://ww1.microchip.com/downloads/en/D ... 39881e.pdf
I like this method because it allows multiple active devices to be connected to the RDY line just like the wire-OR method, and Schottky diodes are almost free anyway.
