6502 or ARM core selection?
If you imagine a frequency locked loop, that's fairly easy to understand: you have a fast oscillator running at some suitably high but approximate frequency, you divide it down by 10 and compare it to the input clock, and you adjust the fast oscillator until the comparison is equal. Now it's running at 10x the input rate.
A phase locked loop is the same, but more subtle.
A phase locked loop is the same, but more subtle.
- GARTHWILSON
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Almost always when i build something new, it does not work on its first powerup, or after a while i decide to rewire some stuff, because i found out that there are better ways of doing things... So lets say i make a schematic for a sbc, and then i order it, and i solder all the components, and then i want to make changes and try just those changes to see how they perform, i would have to order a new pcb. I can't afford to order so many pcb-s.
A major problem is often layout errors in the PCB, things that don't match the schematic. Even when using OrCAD at my last place of work, the CAD operator who took our schematics, entered them on the computer, had us check the schematic, and then laid out boards with the CAD doing the rat's nest with the netlist and so on, still made layout errors, even though the CAD was supposedly there partly to eliminate that problem. A new engineering manager introduced us to a way to check layouts manually that was more foolproof, and I've been using it ever since, and I introduced it to another engineer who also admitted later that it was way better. Both of us were kind of forced into it kicking and screaming on the inside.
What you do is to have the PCB design in CAD in front of you, in a copy that you can destroy as you go. It's best to have two people on this (one on a paper copy of the schematic and one on the CAD), but I normally don't have any help. You pick a net on the schematic, follow it on the CAD, marking the schematic with a colored pencil as you check that net on the CAD, then when you're satisfied that the net goes to everything it should on the layout and not to anything it should not go to, delete that net on the CAD. Now it's deleted on the CAD and marked on the paper schematic. If you find an error, write it down, or fix it in another window. As parts get all the nets they're connected to checked and deleted, delete the part also. If there are errors, they will show up. You might find for example that you're left with a line on the schematic that's not marked and there's nothing left on the board, because that line did not get routed.
I don't like the way any of the CADs work for schematics, although I got very proficient at OrCAD. For example, schematics can be made the neatest and most readable (because of the fewest corners, etc.) if you can re-arrange and re-space the pins of an IC every time you draw it on a schematic; but the CAD doesn't let you do that. Anyway, to this day I still do my schematics by hand. I check my layouts with the method above, and my boards are right the first time, every time. The CAD does have DRC (design rules checking) but it doesn't understand the unorthodox things I do to get extreme density and it will give hundreds, if not thousands, of things it thinks are design rules violations, but if I go down the list and check them all, they're all ok.
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2. I don't have the fancy pcb, i could find a way to get a normal single layer pcb.
You can usually get much better performance with two layers than one, and you might find that the cost is not much different. Certainly you can get better density, and then you don't have to pay for as many square inches (or centimeters). The connection integrity is much better if the holes are thru-plated, and after that, if there's only one layer instead of two, the second side starts out to be all copper and just gets etched away anyway. Going beyond two-layer is where the cost starts going up more because they have to make multiple thinner boards and then laminate them together.
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3. Why [do] all modern computers have coils in the power supply?
They are switching regulators, to get much better efficiency. In the case of power supplies that are powered from the 120/240V 50/60Hz mains, a switching regulator also helps reduce weight, and avoid putting so much noise on the input power line. If the voltage starts out lower than what you need (like if you need 5V or 12V from two 1.5V batteries), you can't get there without reactive components. There are switched-capacitor circuits to step voltage up or invert it, but what you can do with that is rather limited. I have designed and used several switching regulators, although mostly (not entirely) starting with off-the-shelf switching-regulator controller ICs. Instead of trying to explain the operation here, I'll refer you to http://en.wikipedia.org/wiki/Switching_regulator or other articles a web search will turn up.
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
- GARTHWILSON
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That means that in the cpu itself is a very fast oscillator, and it only uses the slower crystal clock for comparison?
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
GARTHWILSON wrote:
Quote:
3. Why all modern computers have coils in the power supply?
Edit:
Could i use this http://www.ebay.com/itm/1-Pcs-Copper-Cl ... 256b0b4d21 and what would be the best way of etching it?
I could also use this: http://www.ebay.com/itm/2-x-TQFP-100-TQ ... 5d31b0356a
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I was never very successful at making my own PC boards. I tried the etch-resist pens but the etchant would eat right through them. I tried painting the lines with a very thin brush, and although it worked, I could not make narrow lines. After etching, I soaked and scrubbed to get all the etchant out of the corners where the coper traces met the board, but still got corrosion sometimes after a few months because apparently I didn't get it all out. Where I worked in the mid-1980's and we did wide stripline transmission lines on PC boards for RF power amplifiers, we would cut rubiliths, put a solution on the board and spin it off in the darkroom, then put the rubilith over it and expose it to UV light, then develop it and etch it, and that worked pretty well, but I don't know where to get whatever it was we used, and I know I still couldn't get very narrow lines. A good PC board house can make traces basically no wider than the thickness of the copper, and if you look at them under a microscope, they truly look square. It's amazing. I'm not saying we go that narrow at our company now, but I regularly do .007" traces and they've proven to be 100% reliable. We go down to .008" vias on the smaller .031"-thick boards, and the thru-plating on them has also proven to be 100% reliable. In the 80's, before we had CAD, we use Bishop Graphics patterns and crepe tape we stuck down on dimensionally stable film, usually 2X or 4X actual size, then take them to a graphic arts shop to have them reduced for the PC board house. At that time however, we didn't have any lead spacing closer than .100".
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
New thread here for the etching of PCBs.
And here for high-speed design - for questions about crosstalk and so on.
Cheers
Ed
And here for high-speed design - for questions about crosstalk and so on.
Cheers
Ed
BigEd wrote:
Another challenge is that for linux you'll need at least 128M RAM (maybe 32M will be technically possible. See Tinycorelinux FAQ. Maybe even 16M - see dd-wrt supported devices)
Cheers
Ed
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ElEctric_EyE
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BigEd wrote:
Another challenge is that for linux you'll need at least 128M RAM (maybe 32M will be technically possible.
http://kildall.apana.org.au/~cjb/sable1.jpg
http://kildall.apana.org.au/~cjb/sable2.jpg
That's in 2 megabytes of RAM. The OpenWRT-based systems are horribly bloated and don't do anything smart with memory at all.
I salute your 2Mbytes (with lots of swap.) I've used compcache with some success on my XO-1 - it swaps to RAM with compression. Makes the RAM go further.
- BigDumbDinosaur
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GARTHWILSON wrote:
What you do is to have the PCB design in CAD in front of you, in a copy that you can destroy as you go. It's best to have two people on this (one on a paper copy of the schematic and one on the CAD), but I normally don't have any help. You pick a net on the schematic, follow it on the CAD, marking the schematic with a colored pencil as you check that net on the CAD, then when you're satisfied that the net goes to everying thing it should on the layout and not to anything it should not go to, delete that net on the CAD. Now it's deleted on the CAD and marked on the paper schematic. If you find an error, write it down, or fix it in another window. As parts get all the nets they're connected to checked and deleted, delete the part also. If there are errors, they will show up. You might find for example that you're left with a line on the schematic that's not marked and there's nothing left on the board, because that line did not get routed.
Quote:
Going beyond two-layer is where the cost starts going up more because they have to make multiple thinner boards and then laminate them together.
x86? We ain't got no x86. We don't NEED no stinking x86!