Recreating the Commodore PET with an FPGA

[ChuckT]

I could easily put this under Nostalgia, Programmable Logic, General or Hardware.

Recreating the Commodore PET with an FPGA

Quote:

Using a Xilinx Spartan-6 FPGA on the Digilent Nexys3 dev board, he has implemented the Pet in Verilog. Like the original, his clone contains 16K of both ROM and RAM, utilizing the same simulated 6502 microprocessor he used on a previous Apple ][+ project. The FPGA version of the computer sports a 640x400 resolution which is twice that of the original, so [Thomas] simply doubled the size of each of the PET’s pixels to fill in the extra space.

http://hackaday.com/2011/10/27/recreati ... /#comments

[BigEd]

Thanks - good find!

Here's the project page - the verilog source is available, and it's based on another 6502 core not yet in our catalogue of 10 cores.

The author is Thomas Skibo.

(Excellent work Thomas, and thanks for open sourcing the core!)



Edit: trimmed some text which was entirely redundant!

[ElEctric_EyE]

BigEd wrote:

Thanks!
... the verilog source is available, and it's based on another 6502 core not yet in our catalogue of 10 cores.

The author is Thomas Skibo, and he previously made an Apple ][+ project.

(Excellent work Thomas, and thanks for open sourcing the core!)...

Yes, thanks to Chuck/Ed for finding that and Thomas for sharing!
I'll be sure to add that to the collection. May take a few days, though I did download the code.

[ChuckT]

Some Amiga users are already talking about wanting to add it to the FPGA Arcade.

[ElEctric_EyE]

Since I'm at work, and work here is very slow today, I decided to run Thomas' core up against Arlet's (just taken from Github, updated 10/8/11) core, using ISE13.2 and fitting for the smallest Spartan 3, i.e. the XC3S50 100-pin.
I don't have ISE10.1 installed here in order to run a comparative test and post results in the Programmable Logic section.
I did not tweak any synthesis settings as this was done on an old laptop. I used 1 speed constraint for the main clocks. It was based on the delay observed after initial syntheses without any constraints.

Both are in Verilog, but you can tell just by skimming over both codes that there are definately 2 different styles. Still spaghettti to me, but worth looking at. The most notable difference is that the "Defines" instruction is present in Thomas's code and very absent from Arlet's code.

Arlet's used much less resources and max frequency was 67MHz.


But Thomas's max frequency was 75MHz.

[ElEctric_EyE]

ChuckT wrote:

Some Amiga users are already talking about wanting to add it to the FPGA Arcade.

So in my limited internet skimming, am I to gather that FPGAARCADE is competing against the COne?... The COne claiming to be the first re-configurable computers to be made available?

[ChuckT]

I don't think they are really competing. I've seen the C-one author active in the Natami community. They have seperate projects but the Amiga users are more united and helping one another. They've contributed by paying bounties to get programmers and individuals to create new hardware or software for all Amiga users. I've even seen the docs for the Minimig shared online.

I think the Beaglebone is the way forward because it is a 1 GHZ single board computer running Linux and it has an SD card attached so it can already do video. I haven't seen any interest in the C-128 or Amiga communities for this and I feel it is a shame because I'm not asking them to leave their beloved hardware and the other reason it is a shame is because they have a large user group and any hardware can be programmed to behave like the hardware they use and love.

I probably need to have more to offer but the beaglebone isn't even out yet. My other choice is the M4 Cortex running around 100 MHZ, plenty of i/o and ram with an accelerometer for about $20 and Farnell has it in stock but Mouser and Digikey are backordered.

Other people are waiting for the Rasberry PI. I like it and might even get one but its not my microcontroller of choice or at least not yet.