65Org16.x Dev. Board V1.0 using a Spartan 6 XC6LX9-3TQG144

Arlet · Post by **Arlet** » Wed Sep 28, 2011 12:32 pm

ElEctric_EyE wrote:

Arlet wrote:

...The UART wrapper I wrote later, when I needed a UART in a 6502 project. It uses two memory mapped registers. One for data, and the other for control/status.

If it just uses 2 addresses why does it need 2 address lines? I would have thought 1 address line for 2 addresses.
Are the data register and command/status register separate read & write addresses?

I think I was already reserving space for 4 registers, but never used more than 2. Feel free to change

Code: Select all

wire [1:0] register = AB;

into

Code: Select all

 wire register = AB[0];

.

Also, I noticed the code defines a BASE_ADDRESS, but never uses it. Instead it relies on an external select signal. The BASE_ADDRESS parameter can be removed too.

ElEctric_EyE · Post by **ElEctric_EyE** » Wed Sep 28, 2011 2:33 pm

ElEctric_EyE · Post by **ElEctric_EyE** » Fri Sep 30, 2011 12:30 am

Arlet · Post by **Arlet** » Fri Sep 30, 2011 5:11 am

ElEctric_EyE wrote:

Also, I had to modify line 13 from:

Code: Select all

input [1:0] AB;

to:

Code: Select all

input [0:0] AB;

...

Usually you'd write that as

Code: Select all

input AB;

Quote:

Just to clarify operation of the bit settings on your UART core:
When AB[0:0]='0', the cpu is reading/writing from/to the data register?
When AB[0:0]='1' the cpu is dealing with the command/status byte?
Bits 3 and 4 are write only, thereby setting an interrupt enable for receive and transmit respectively and that would be the command part of the byte?
Bits 5,6,7 are read only making it the status part of the byte?

Correct.

By the way, the UART wrapper does not set DO=0 when it's not selected, so you can't simply OR it together with other peripherals. You either need to put a wrapper around it that will take care of generating the 'sel' signal, as well as setting DO=0, or modify the uartif.v code so that DO=0 when !sel.

ElEctric_EyE · Post by **ElEctric_EyE** » Fri Sep 30, 2011 3:00 pm

ElEctric_EyE · Post by **ElEctric_EyE** » Fri Sep 30, 2011 7:26 pm

ElEctric_EyE · Post by **ElEctric_EyE** » Fri Sep 30, 2011 9:39 pm

ElEctric_EyE · Post by **ElEctric_EyE** » Sat Oct 01, 2011 11:33 pm

BigEd · Post by **BigEd** » Sun Oct 02, 2011 10:12 am

Arlet wrote:

By the way, I've pushed some fixes to the github archive of the verilog-6502. You'll need to merge those with your own forks.

Thanks - just done my merges, I'm all up to date with your core now.

I had to do one additional change - you seem to have dropped an 'end' in the fix to the I reg update.

EEye: I haven't picked up any of your work in git, as our code has diverged quite a bit - mostly in small ways, but it makes it fiddly to see where the interesting differences are. I think we have
- you removed BCD textually, where i used defines
- you also removed SED and CLD, and the D flag
- you did a lot a reformatting
- you init the stack pointer and registers
- you re-indexed AXYS
- you did some additional change from <= to = (in cond_code, on June 8)
- finally, you added PHX, PHY, PLX, PLY (again, without defines)

Those last three changes I think I'd like to pick up on. I'm not sure I have the git commands to do that by inheriting your history. I think I need cherry-picking.

Generally, I would like to add some 65C02 instructions, but I'd do it with defines to make them configurable. (Just as I keep BCD, but as a configuration option.)

First though, I think I need some kind of debug port, maybe with single-stepping using RDY, because something isn't quite right with my SoC.

Cheers
Ed

Arlet · Post by **Arlet** » Sun Oct 02, 2011 10:45 am

BigEd wrote:

I had to do one additional change - you seem to have dropped an 'end' in the fix to the I reg update.

Thanks. It's been fixed now.

ElEctric_EyE · Post by **ElEctric_EyE** » Sun Oct 02, 2011 10:52 am

BigEd · Post by **BigEd** » Sun Oct 02, 2011 2:53 pm

Hi

ElEctric_EyE wrote:

BigEd wrote:

...
- you did some additional change from <= to = (in cond_code, on June 8th)

I was following Arlet's lead there. Check his posts on github on Jue 8th...

Yes, understood - I wasn't criticising, just cataloguing. On github you'll see there's a button 'Fork Queue' which shows how far out of sync you are with other people on a project. It's meant for the case where the different forks are trying to stay together, which perhaps isn't quite what we're doing. But it does show the various differences.

Quote:

I've found it difficult to navigate on github. I really wanted to keep the version I had, before trying to add in opcodes, as my standard for the .b version, and then have a .c version for added opcodes. Should I have forked off my own?

I'm not sure what the best tactics are, to be honest. What you can do in github is one thing, and then there's what you can do in 'git', the tool itself, which is a lot more powerful. You could I think make a 'version release' just before you started to add the 65c02 instructions. But I think to do that you need to use the git tool - I don't think you can do that just by pushing buttons in github.

Quote:

How can I go backwards and delete a commit?

Again, this is something you can do if you run the 'git' tool on your computer, but that can be quite an intimidating thing do to. Because the history of the project is always kept, it's still possible for you or anyone to pick up the state of the sources just before you started adding the 65c02 instructions.

Or you could take the state of cpu.v at that time and copy it, and check in the copy. Again, not sure if you can do that purely using the github web interface.

Quote:

BigEd wrote:

...Those last three changes I think I'd like to pick up on. I'm not sure I have the git commands to do that by inheriting your history. I think I need cherry-picking...

That's what I do... I look at the commit history and it shows in red which lines have been deleted and in green what has been added. I do it line by line to make sure I got it right.

Right - but I meant the git command git cherry-pick which takes a particular change from someone else, and applies it to your project knowlingly - it has the author and the timestamp of the original change. Probably overkill for what we're doing, but formally I think it's the way a tool like git is supposed to be used.

Unfortunately, trying to do things the right way can have the effect of slowing things down and making them more complicated - so feel free to ignore all these considerations!

Cheers
Ed

ElEctric_EyE · Post by **ElEctric_EyE** » Sun Oct 02, 2011 3:09 pm

BigEd · Post by **BigEd** » Sun Oct 02, 2011 4:06 pm

I wouldn't normally be enthusiastic about starting over - the strength of a revision control system like git is that it keeps track of history. Usually better to go where you want to go, starting from where you are now.

But I think there are a couple of tactical questions to decide before proceeding,

ElEctric_EyE · Post by **ElEctric_EyE** » Sun Oct 02, 2011 4:59 pm