After my first paragraph on my last post, I should have gone on to say that after adding the DRIVE constraint and setting it to 4mA, it is running for many hours! I will still
yet hold off on wirewrapping a laborious 28 bypass cap's...
Arlet, are you offering to add your expertise to add those commands for a "mod'd" core? If you are, that would be awesome!!!... But, even if you aren't, I've reread this entire thread last night and seeing how the display I am using was sort of a disappointment as far as testing a 6502 cores' top speed, I think I need to take you up on your original offer and add your 640x480 VGA core controlled by another 6502 core... The TFT display could still be used in a troubleshooter type mode at 38MHz as a master controller/debugger with the current 6502 core along side the PS/2 core. I would strip the RAM/ROM to an absolute minimum for this core. It would also be an I/O controller for the SD card and Flash.
I see your VGA core is good for 200MHz! according to your webpage. I can get 2x 2Mx8 10nS asynchronous
SRAM's. This would provide 13 bits of color @640x480 with a pixel rate Max of close to 100MHz. The single most negative about this entire idea is that
each SRAM @10ns in a 54-pin TSOP II package demands 275mA each. I anticipate they will add quite abit of noise...
The addition of the 2 SRAM's would force the SD Card connector offboard and the 100-pin QFP
CY7C67300 offboard as well, but I don't think that will be a problem. The very high speed ram would be right under the Spartan 3, and the DB15 VGA connector in the upper right next to the Vreg's. I think I will need DAC's too?. Not quite up to par on video, but will be soon.
I'm very excited by this! The last time I did a video project was over 20 years ago in high school, before my hibernation, i.e. my failure in college to be an EE major, even though electronics was my obsession. Too much theory, and I was too young so I had to pursue another hands on career, autos... Anyway, I remember I had used a SMC8002 display/font/cursor generator and the SMC5037 CRTC (I actually wound up using the 6845) controlled by a MOS6502B, and made an 8 bit R2R ladder for 256 shades monochrome and it worked pretty good on a composite monitor. I'm pretty sure I still have those old datasheets too, they included all the formulas to calculate HSYNC, VSYNC, and the final pixel clock. AH, I'm rambling again. I must go check the display...
Been running for 5+ hours now.
![Laughing :lol:](./images/smilies/icon_lol.gif)