Obviously I've forgotten something obvious (though my code looks very similar to Garth's helpful page) and I can't see what it is.
Code: Select all
;-----------------------------------------------------------------------
; real time clock timer operations
; Ph2i clock is 1.8432MHz; we want a 50Hz interrupt. Set up timer one
; in free run mode to give that frequency and start it running.
; The timer interval is 1843200/50 = 36864; subtract two for timer
; overhead
start_tick:
stz fiftieths
stz seconds
stz minutes
stz hours ; reset the clock to midnight (at the oasis)
lda # lo 36862
sta VIAT1CL ; register 4
lda # hi 36862
sta VIAT1CH ; register 5; load counter with full byte
; and reset IFR6 (timer 1)
lda VIAACR ; register $b
and #%01111111
ora #%01000000 ; repeated interrupts required, no portb output
sta VIAACR ; started
lda #%11000000 ; set interrupt enable for timer one
sta VIAIER ; register $0e
cli ; enable interrupts
rts
;-----------------------------------------------------------------------
; real time clock update on irq
; We do not allow further interrupts in this atomic operation
; There are no interrupt sources other than this (at the moment).
rtc_update:
bit VIAT1CL ; reenable interrupts
pha ; acc is the only register used
inc fiftieths
lda fiftieths
cmp #50
bne rtc_u_x ; not yet fifty?
stz fiftieths
inc seconds
lda seconds
cmp #60
bne rtc_u_x
stz seconds
inc minutes
lda minutes
cmp #60
bne rtc_u_x
stz minutes
inc hours
lda hours
cmp #24
bne rtc_u_x
stz hours
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; FIXME extend to date
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
rtc_u_x:
pla ; restore acc
rti ; restores binary mode etc
Code: Select all
;-----------------------------------------------------------------------
;
; reset and interrupt vectors
code
org 0xfffa
dw init ; nmi
dw init ; reset
dw rtc_update ; irq/brk
Help?
Neil