Whoops...
Re: Whoops...
Replacing 128K RAM with 512K on Z80ALL. It turns out 512K is bigger in both memory contents and physical size.
Bill
Edit, couple more mis-fit pictures that were posted previously,
viewtopic.php?f=4&t=6701&p=86787&hilit=68000+900#p86776
viewtopic.php?f=4&t=6701&p=86787&hilit=68000+900#p86782
Bill
Edit, couple more mis-fit pictures that were posted previously,
viewtopic.php?f=4&t=6701&p=86787&hilit=68000+900#p86776
viewtopic.php?f=4&t=6701&p=86787&hilit=68000+900#p86782
- BigDumbDinosaur
- Posts: 9425
- Joined: 28 May 2009
- Location: Midwestern USA (JB Pritzker’s dystopia)
- Contact:
Whoops...
I’ve had a few of those and each time, I metaphorically slapped myself in the head when it happened.
POC V1.0 was partially DOA on the first try due to the DUART having no connection to its /CS pin. For some reason, I had not linked the schematic to the PCB, so the missing connection went unnoticed during the PCB layout phase. Naturally the error ended up in the PCB and sent me on a wild goose chase. Fortunately, a short piece of bodge wire got things working (to be followed by more bodge wiring to fix a design defect).
In another situation, during a PCB layout, I used the wrong footprint for a bus driver. The SOIC-20 part that I was using was physically wider than the footprint I chose, and due to where the part was located, the wider part simply wouldn’t fit. I didn’t know at the time that SOIC-20 came into two package sizes...same pin pitch, but different widths. I had to scrap the PCBs and order new ones. As I said at the time, it’s only money!
POC V1.0 was partially DOA on the first try due to the DUART having no connection to its /CS pin. For some reason, I had not linked the schematic to the PCB, so the missing connection went unnoticed during the PCB layout phase. Naturally the error ended up in the PCB and sent me on a wild goose chase. Fortunately, a short piece of bodge wire got things working (to be followed by more bodge wiring to fix a design defect).
In another situation, during a PCB layout, I used the wrong footprint for a bus driver. The SOIC-20 part that I was using was physically wider than the footprint I chose, and due to where the part was located, the wider part simply wouldn’t fit. I didn’t know at the time that SOIC-20 came into two package sizes...same pin pitch, but different widths. I had to scrap the PCBs and order new ones. As I said at the time, it’s only money!
x86? We ain't got no x86. We don't NEED no stinking x86!
- BigDumbDinosaur
- Posts: 9425
- Joined: 28 May 2009
- Location: Midwestern USA (JB Pritzker’s dystopia)
- Contact:
Whoops...
plasmo wrote:
Edit, couple more mis-fit pictures that were posted previously,
download/file.php?id=22024&mode=view
download/file.php?id=22024&mode=view
At least you had conveniently-placed holes through which to route the bodge wiring. On POC V1.0, I had to run wires around the end of the PCB to make connections—being a four-layer board, I couldn’t drill through it. My handiwork didn’t look too good, but was stable at 12.5 MHz.
x86? We ain't got no x86. We don't NEED no stinking x86!
Re: Whoops...
Don't know if you can see it, but when I tracked this PCB I put the holes for a linking wire too close to the IDC header on the left. I ended up having to shave a shamfer in the bottom of the header to make space for the wire. All 150 of them. 
- Attachments
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- pcb1.jpg (4.38 KiB) Viewed 10466 times
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JGH - http://mdfs.net
JGH - http://mdfs.net