Jmstein7 wrote:
Ha! I’m struggling to get past 8mhz! And I’m using 55ns Flash Rom, as the EEPROMs I was using didn’t get below 100ns; but, everything is hand soldered. What RAM and ROM are you using to get to 20mhz? I didn’t know it was possible to get past 14mhz, or so.
My POC V1.2 unit runs at 20 MHz with one wait-state on ROM and I/O accesses. I am using a 55ns EPROM and 10ns SRAM. Other I/O devices are the two DUARTs, SCSI host adapter and an RTC, the latter which is the slowest I/O device in the system.
POC V1.1 runs at 12.5 MHz with a 55ns EPROM, 12ns SRAM, one DUART, SCSI host adapter, RTC and no wait-stating.
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As to autorouter, what does that workflow look like? I HATE routing manually. Hate it. It takes me forever, and I’m always guessing with trace sizes and VIAs and all that. I’ve also only used double layer PCBs.
I have never used autorouting—I don’t even have software that can do it. All of my POC layouts have been in the range of 6" × 4", four layers, a mix of through-hole and SMT parts and manually routed. Like other automated design processes, PCB routing is seldom as good as it will be when manually performed. It just takes some experience to get good at it—I’ve been doing PCB layouts off-and-on for some 40 years.
In computer work, four layers is better, since the inner layers can carry VCC and ground anywhere it is needed on the board without getting in the way of the signal traces. As a bonus, a four-layer board is quieter. I estimate a gain of 25 to 30 percent in board density by going with four layers, and some rearranging of devices and other board features. I’d bet you I could substantially shrink your board by redesigning it in four layers and manually routing it. Also, there are smaller ZIF sockets available than the one on your unit. See attached for an example.
As for PCB cost, ditto on what Gordon noted. I can recall when getting custom PCBs made ran into four figures (USD). In the early 1990s, I had some PCBs made for a custom host adapter, in two layers and about the size of a credit card. Five PCBs cost $450 to produce, plus a one-time setup charge of $150. Even as recently as 2003, when I was building modules for a large-scale model railroad automatic block signal system, I was paying the equivalent of around 15 USD per PCB, and those were only two-layer boards! Current prices are a real bargain, even for multiple layers. It costs more to ship PCBs from JLCPCB to the USA than to have them made.
As an aside, should I need PCBs with Underwriters Laboratories recognition, I deal with a US-based board house. Although their prices have plummeted in the last 10 years, they are about five times as expensive as JLCPCB, despite substantially lower shipping costs.
- POC V1.2 PCB Layout
Above is what POC V1.2’s PCB layout looks like. This was the last unit I built with PDIP glue logic parts. It’s not as dense as it could be, mainly because I habitually leave room for adding bodge wires in case I want to fix or change something in the logic. However, it’s dense enough to run at 20 MHz with some timing headroom remaining. Signal traces are 0.006" width, using .026"-diameter via with 0.008" holes. Center-to-center signal trace spacing is 0.025" in the densest areas.
- POC V2.0 PCB Layout
Above is the layout for POC V2.0. Most of the glue logic is in an ATF1504AS CPLD. Again, I left room for doing some bodge wiring...just in case.
