Quickest method to detect 8 bit zero using discrete ICs

[AndrewP]

Given easily available ICs today I'm wandering what is the quickest circuit for determining if 8 signals are all zero. That's quickest in terms of time and ideally fewest ICs needed.

I suspect the answer is:

Detect Zero.png (10.96 KiB) Viewed 9813 times

but I'm hoping I've missed an obvious single chip solution.

I know there used to be an 8-input 74 series OR gate but it doesn't seen to have ever been manufactured in one of the fast families and doesn't seem to be generally available anymore.

I'm using a '540 because that's sacrificing something like half a nanosecond to allow a single IC to do the inversion as compared to two '04s.

[BigEd]

This search at Mouser, or one like it, might help - I see there's an 8 input OR from TI that's available in single units for 37p: the CD4078BNSR. Or for 58p, the through-hole CD4078BE.

Edit: those might be too slow, though. Perhaps consider two four input gates and a two input to combine their outputs?

[drogon]

AndrewP wrote:

but I'm hoping I've missed an obvious single chip solution.

A GAL?

-Gordon

[cjs]

Do they no longer make the 74'682/684/685/687/688 8-bit comparators? Just wire all the Q inputs of it to 0, and when the P inputs are all 0 you'll see the /(P=Q) line asserted.

[AndrewP]

BigEd wrote:

Edit: those might be too slow, though. Perhaps consider two four input gates and a two input to combine their outputs?

If I drop all the way down to 3-input ICs then I can do the following:

Detect Zero.png (9.29 KiB) Viewed 9805 times

Which is marginally faster than the F family solution in my first post. But, gah(!), that's four tiny ICs. And they're not cheap either. A single 4-ciruit version would be awesome though whilst I'm making wishes a blindingly fast 8-input OR gate would be perfect.

drogon wrote:

A GAL?

Which brings me to Gordon's suggestion which, if I use one of my precious ATF16V8C-5JXs and program my own 8-input OR gate, would be even faster (by the datasheet) than all the other solutions. Owe, that pains me to use a GAL but if I'm scrabbling for nanoseconds... that's on me.

[AndrewP]

cjs wrote:

74LS68X .. 8-bit comparators? Just wire all the Q inputs of it to 0, and when the P inputs are all 0 you'll see the /(P=Q) line asserted.

I didn't think about that! I have a couple, literally two, '684s because each of those little buggers costs about as much as that GAL I mentioned above.

However the 74F521 8-bit comparator is significantly cheaper and faster than the 74LS68Xs. And I have plenty. And it's a single IC. And I suspect that - given the right conditions - it could do the equals zero comparison in under 5ns. Experiment time!

[BillO]

Typical pd times for the 74LS68X are around 15ns.

Have you considered diodes? Something like the HN2D02FUTW1T1G will typically switch in less than 3ns.

What's the application?

[strik]

BillO wrote:

Have you considered diodes?

I had thought about wired-or, too, but I am not sure about the propagation delay.

[AndrewP]

BillO wrote:

Have you considered diodes? Something like the HN2D02FUTW1T1G will typically switch in less than 3ns.

I haven't. I must admit I have no idea how I'd go about doing that.

My application is to quickly tell if an '816 is running in bank zero or not. Ideally with an active low indicating bank zero.

[epooch]

MC14532B or CD4532B?:

Code: Select all

Input                      | Output
Ein D7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0 Eout
1   0  0  0  0  0  0  0  0  0  0  0  0  1

Eout HI = yep it's zero

It is CMOS, so it should be quite fast:
https://www.onsemi.com/pdf/datasheet/mc14532b-d.pdf

EDIT: TI CD4532B shows 220ns max, much slower than the comparators you already have.

[akohlbecker]

If this is for the bank address, consider using an inverted latch (563) instead of a 573 and a 540, saving you one chip and one gate delay!
The memory ICs won't care if the bits are inverted, but your address decoding might need an update.

[Yuri]

AndrewP wrote:

BillO wrote:

Have you considered diodes? Something like the HN2D02FUTW1T1G will typically switch in less than 3ns.

I haven't. I must admit I have no idea how I'd go about doing that.

My application is to quickly tell if an '816 is running in bank zero or not. Ideally with an active low indicating bank zero.

My suggestion would be to use wire-or (super simple), a competitor wired all to zero, or a PLD. (The PLDs I have can be programmed with my EEPROM programmer).

If you're goal is to adjust the address for your zero page for the 65816 and then further split the address down more in order to have that lower 64k map to something useful in emulation mode, then I would recommend using a PLD or CPLD to do the decoding. You might find that CPLD can also help with adding extra banks of RAM for your 65816!

[GARTHWILSON]

AndrewP wrote:

BillO wrote:

Have you considered diodes? Something like the HN2D02FUTW1T1G will typically switch in less than 3ns.

I haven't. I must admit I have no idea how I'd go about doing that.

My application is to quickly tell if an '816 is running in bank zero or not. Ideally with an active low indicating bank zero.

You'd replace all your inverters in the head post with diodes, still pointing to the right and with their cathodes (which are on the right) connected together, and a pull-down resistor.  If any of the inputs is high, it will pull the output up, while the low inputs will not turn their respective diodes on.  If all inputs are low, the pull-down resistor will pull the output low (assuming a CMOS load).  The rising will be pretty quick, but the propagation time to get the output to go from high to low will be really long (ie, slow), because the pull-down resistor has to charge all the capacitance on the diodes and other things connected there, and you have a bad RxC time constant to deal with.

The fastest I've found (I don't know if you need it absolutely as fast as you can get it though) in 5V and an SO-20 package is the Harris CD74FCT521DTM at 4.2ns max with a 50pF & 500-ohm load.

[AndrewP]

epooch wrote:

MC14532B or CD4532B? ... shows 220ns max

It's still a pretty cool idea. If instead of the '4532 I used an 74LS148 8-line priority encoder then then I can use EO and GS as the output from an 8-input NAND and AND gate respectively. That's probably a propagation time of 10 to 20ns and the use of a priority encoder in a way I would not have thought of.

akohlbecker wrote:

If this is for the bank address, consider using an inverted latch (563) instead of a 573 and a 540, saving you one chip and one gate delay

I got so excited here! For my bank zero use case (rather than the general how to detect zero use case) I could use a '573 and a '563 both latching the bank address and saving me that one gate delay and also saving me from reworking the rest of my address decoding.

And then I started looking for inverting latches. And there was no 74LVC563 nor 74LVC533. And I was sad. But then I found a 74ABT533!*

And it's not generally stocked with only large quantity orders available on DigiKey. And then I was sad again . That's the rollercoaster I put myself on by trying to use all discrete ICs

Yuri wrote:

My suggestion would be to use wire-or..

GARTHWILSON wrote:

You'd replace all your inverters in the head post with diodes, still pointing to the right and with their cathodes (which are on the right) connected together, and a pull-down resistor.

Thanks for the explanation! I never used anything that doesn't have totem pole (I think it's called) outputs. At least not for logic.

The slow high to low output change would be a bit of pickle; and as I saw pull resistor I started getting nervous so I'm glad you explicitly mentioned that.

GARTHWILSON wrote:

The fastest I've found (I don't know if you need it absolutely as fast as you can get it though) in 5V and an SO-20 package is the Harris CD74FCT521DTM at 4.2ns max with a 50pF & 500-ohm load.

That looks like it would be the absolutely fastest. But back in the realm of reality if I need those fractions of a nanosecond then I probably need to step outside and touch grass or something. It's been good fun looking at all the possible solutions though.

*I've found the ABT family to be ridiculously fast - sometimes faster than LVC.

[BigDumbDinosaur]

BigEd wrote:

...I see there's an 8 input OR from TI that's available in single units for 37p: the CD4078BNSR.

Edit: those might be too slow, though. Perhaps consider two four input gates and a two input to combine their outputs?

Anything in the CMOS 4000-series will be too slow. I’m not aware of any eight-input OR that is available in any of the fast logic series. Input inversion on a 74x30 (I've used TI’s 74AC11030, which is the high-speed version of the older 74HC30) is practical if the extra prop time is tolerable.

A possible substitute would be to program a 16V8 GAL to act as the equivalent of the 74HC30, the logic being /Y=!(A&B&C&D&E&F&G&H). It would be simple combinatorial logic that would incur no more than the device’s pin-to-pin prop delay. Microchip’s currently-produced GALs are available down to 7.5ns, which is comparable to the 74AC11030’s prop time on five volts.

Something to consider is in the realm of bank $00 detection, you only need to decode the number of bits you are actually using. In a 512KB system, that would be three bits.

AndrewP wrote:

And then I started looking for inverting latches. And there was no 74LVC563 or a 74LVC533. And I was sad. But then I found a 74ABT533!*

Not to rain on your parade, but the 74ABT533 is a Bi-CMOS device that produces TTL-level outputs. Also, 74F and 74LS produce TTL outputs. These devices’ usefulness is questionable with a WDC MPU or peripheral device.

At some point, you have to accept the fact that an all-discrete design is going to hit a timing wall that can’t be surmounted. That truism was one of the driving forces behind the development of programmable logic in the 1980s.