Indeed, as the target speed is 1MHz, it's not fair to criticise that the design won't go at great speeds. It's not meant to, and the comment is just a temptation to scope creep.

Keep it simple, stick to your goals, and get it working. Plenty of possibilities for going further, after you have ...

For the benefit of your readers, your glue logic would be easier to visualize in schematic form.

[s]Will do, once I get it drawn up.[/s]

BTW: if a picture is worth 1,000 words, is a video worth 60,000 words per second? :P

Here is my proposed address decoder:
My Address Decoder - BW.png

Also ...

Reading FAT32 from SD cards is not out of the question even without an Arduino in between - if you're happy to borrow code, I shared a fairly compact implementation on github a few years ago, and have been using it pretty much unchanged since then, especially for large data files.
You can see it ...

This question arose mostly due to me second guessing what I thought I already knew. Its good to have confirmation that I was on the right track. Thanks to BDDinosaur and Garth Wilson, I have a much better understanding of what I'm looking at in the datasheets.

Now, I'm confident that I can crunch ...

Thanks again BDDinosaur! Based on both responses, I believe I should refer to the 5V (14MHz max) column since that is the voltage I intend to use. This goes a long way towards furthering my understanding of the timing diagram and the animated timing diagram that was linked in Garth's primer.

I know the max frequency is voltage dependant, but are the timings given in nanoseconds dependant on the voltage or frequency? Or is it more complex and depends on which specific timing I'm referring to?

The chart on page 25 of WDC's 6502 datasheet only gives timings between 5V (14 MHz max) to 1 ...

And again—if you have a slow RAM that needs more time, you can select it before Φ2 rises, as long as you don't bring its WE\ line low until Φ2 rises. That will require deriving separate RD\ and WR\ signals though, for its OE\ and WE\ pins, respectively, like BDD shows here. If your RAM is fast ...

To clarify, I'm using the RAM that came in Ben Eater's kit: HM62256BLP-70, which has a 70ns minimum access time according to its datasheet. The fastest I plan to run is 1MHz, which is the oscillator that also came in the kit. With 1000ns per cycle at 1 MHz, I don't think timing will be much of an ...

The legendary Garth Wilson himself answers my first post! I am so honored!

So, if I understand everything I've read, it is only after the clock goes high that everything - address, data, and R/W, are guaranteed to be valid coming from the 6502, and throwing the chip select low triggers either the ...

While I won't dispute the fact that it works, why does Ben Eater (and so many others) gate the RAM chip enable on the clock signal rather than the R/W signal? Simplicity? Chip count? Something else?

With the gated chip enable, the only time the RAM would do anything is on the high end of the clock ...