The 65CE02 already has a 4 byte AUG instruction ($5C) "reserved for future expansion", whose purpose I assumed was to act as a prefix, followed by a new 3 byte opcode, giving 256 more operations. This would surely be a more conforming way to do this?

As far as I can know, AUG is replaced by the ...

Thanks for the answers!

SPI has 4 different modes, I would implement only "mode 0" since it seems to be the common "language" among almost all of the SPI capable devices I would need. But anyway, all SPI modes has the attribute to have rising or falling edge of the clock to "read" the signal (ie ...

I'm thinking about building an "SPI interface" using 7400 ICs. I am not sure if it's already done by someone else though. It does not seem to be complex, but the evil is always in details :) What I can think, that some standard shift-in, shift-out register parts can solve the problem of generating ...

On Mouser's site, if you click on one of the stock numbers, you'll get a page that's just about that one crystal, and there will be a thing to click on for the data sheet for it. I looked at a few, and it looks like they're parallel if they specify a load capacitance, otherwise they're series. It ...

Well, I mean about a crystal alone, not a can oscillator. I am sure it's because the lack of the knowledge at my side, just I have problems to understand the situation. If you see a schematic, you can read that eg you need a "BC 107" transistor, so you know the exact type. At the other hand, when ...

Hi, maybe not the best topic to ask, and maybe not the right forum ... It seems I have lack of knowledge about quartz crystals. I'm wondering if someone can help, or suggest me some on-line resources about this topic. The problem when a schematic states that I need a quartz for 12MHz. But electronic ...

If I remember correctly, the Commodore Amiga was orginally supposed to be based on the Z8000.
The Z8000 was late to market, so they wound up using the 68000 instead.

Toshi

As far as I know Commodore 900 was designed to have that CPU (Z8000). Amiga (had different name then, can't remember, Lorine ...

Dear 6502 core writers :D .

Say, you can do 32-bit wide memory accesses. Why not exploit this in the core ? Gets rid of all those pesky byte-wide instruction fetches. Instant speedup. E.g. simply replace every opcode fetch with a 32-bit memory read. Combine result with leftover bytes from any ...

I am curious how to generate the VGA signal. An average MCU of todays can do it for you, simple enough, from its own SRAM. The problem: MCU's SRAM is quite limited (more suitable for text-only mode with character set in the flash of the MCU, so you only need eg ~1K for 40*25 without colours, for ...

The discrete form of the W65C02S readily operates at 20 MHz, as does the W65C816S. ASIC forms of the 65C02 have run at speeds up to 200 MHz, far beyond what the fastest versions of the 68K family could do.

Freescale Coldfire said to operate at even 300MHz (afaik the fastest "real" 68k is 68060 ...

Hi,

I'm writing a software based emulator of a 65C22 VIA, also because to get it to know better. Shift register (SR) is especially confusing for me, since I've never needed it. I try to follow WDC's documentation, however there is something I can't understand. The documentation states that reading ...

OK, I totally get it. I suppose the proper solution for you is a shift register or two.

However, having used the stock C64 disk drive, I am convinced that bitbanging SPI would be an incredible increase in performance, even at 50khz.

Hehe, that's _so_ true :) Nearly everything is faster (well ...

@LGB: The whole point of wanting to use a 6502 in any form is a bit odd, considering that there are so much more powerful alternatives. It's not surprising that everybody has their own specific motivations and self-imposed restrictions. So, maybe you are odd, but not worse than anybody else here ...

I will try to be the voice of reason here. If speed is in fact an issue, why not get a 45MHz 6502 computer for $25? And since it's on an FPGA, you can pop in a shift register with no problems if you feel like doing some interesting work. The FPGA is 1/2 full, so there is plenty of room for ...

It seems possible to achieve close to 100KHz clocking bitbanging even at 1MHz. Even at 50KHz you can read data at the rate of 6K per second! You will fill your 64K of RAM in 11 seconds, or more realistically, load a respectable 32K app in under 6 seconds. Is it really worth adding extra hardware to ...