Tests have passed, so at least on a very rough level, it's cycle and logic compatible now.

Now I have to get onto working on devices -- most importantly a UART emulator that has a processor-facing interface similar to a real-world chip. Only question is what UART chip should I emulate?

Edit: I ...

Could be interesting. The "initial state" setups wouldn't work so I'd have to write a whole burn in suite.

Well, I'm running into a problem while testing -- I'm using https://github.com/SingleStepTests/65816 as the data to test against...

is it just me or are the MVN/MVP test JSONs in that repository just wrong? For example, the first line in 54.n.json starts with the accumulator at 0xEF9B, but ...

https://github.com/lunarlabs/EightSixteenEmu

This is a dumb little work in progress just for fun thing I'm making. Its major feature that I'm designing this around is modularity in the memory map -- instead of having a hardcoded memory map configuration, you assign devices to memory address ranges ...

Here's a new version of the PCB.

The reset circuit's on the power board

Is this different from decoupling caps?

On both the power and ground planes? (power on page 2, ground on page 3)

So, from the design thread in the newbie forum, I refined (mostly by removing things that would only increase complexity for a first-time board) the design. The Dragon v1.0 runs at a 4 MHz clock speed and has:


One 65C22 VIA to provide an SPI bus and GPIO
DS1305 real-time clock
FRAM to hold ...

Well, I had to change out a few of the discrete logic chips because they were either non-existent or didn't have a through hole version. I'll do some timing calculations and if it works out, I'll post a new thread about what I'm making in the Hardware section I guess?

This is a bit of a tricky problem: Should I put the IRQ# lines from the RTC and the UART into the control lines of the 65C22s or should I have them go into, say, a 74LVC21 that outputs direct to the IRQ# input of the microprocessor? I already have the SD detect switch go to CA1 on VIA1 but that's a ...

Latest update! Added FRAM and the SD card sheet.

Now, some questions I have (besides the usual "is everything correct" one):

I want to hook up a 7-button keypad, preferably on 1-B. How would I go about doing that?
Should I add RS-232 capability, and if so, can I use a Maxim 3111E on the SPI bus ...

There are two RAM chips in the schematic - a 128Kx8 used to cover the area from 0x000000 to 0x00BFFF, and a 512Kx8 used to cover the area from 0x010000 to 0x07FFFF. You could ditch the 128Kx8 chip entirely and use the 512Kx8 one to cover both areas. This would save a 32 pin DIP package and quite a ...

Here's the latest draft, including the 65C22s. I'm using port A of VIA 1 solely for SPI applications. I'm thinking of having SPI2 be 5V, and maybe putting a PS/2 connector and/or a simple 7-button keypad on 1-B. I'd use a TXB0104 to handle the shifting between 3V3 and 5V but what should I link the ...

Oh yeah, I wasn't thinking clearly, that would only require an additional select line wouldn't it?