Search found 9 matches
- Fri Sep 11, 2020 8:54 am
- Forum: Programming
- Topic: LLVM for MOS update 2020.08.19
- Replies: 30
- Views: 5926
Re: LLVM for MOS update 2020.08.19
In practice this does mean that LLVM generated code will move all code from 16-bit memory to 8-bit memory before doing math operations on it and then pushing it back to 16 bit memory. However, I'm expecting that giving LLVM a plentiful range of virtual registers, should allow it to be smarter about ...
- Thu Sep 10, 2020 12:42 pm
- Forum: Programming
- Topic: LLVM for MOS update 2020.08.19
- Replies: 30
- Views: 5926
Re: LLVM for MOS update 2020.08.19
The other thing that might be a problem when treating zp as a register file: when programming in assembly by hand we really seldom treat it as registers. There are virtually no scenarios where a data from memory would be transferred to zp, manipulated and then written back - and that's the way ...
- Wed Sep 09, 2020 2:25 pm
- Forum: Programming
- Topic: LLVM for MOS update 2020.08.19
- Replies: 30
- Views: 5926
Re: LLVM for MOS update 2020.08.19
I don't understand what a "section target specific flag" is.
Obviously I'm not an expert. I've just spotted that the section flags are pretty extetsible. Please look that there are placeholders for target specific flags and processor-specific flags. There are already X86, MIPS and ARM specific ...
Obviously I'm not an expert. I've just spotted that the section flags are pretty extetsible. Please look that there are placeholders for target specific flags and processor-specific flags. There are already X86, MIPS and ARM specific ...
- Thu Sep 03, 2020 10:46 am
- Forum: Programming
- Topic: LLVM for MOS update 2020.08.19
- Replies: 30
- Views: 5926
Re: LLVM for MOS update 2020.08.19
Hi!
You are checking whether a section is zero-page section if its name is ".zp", ".zeropage" or ".directpage".
How about introducing new section target specific flag? It could have a letter "z" in section declaration for example and I think it can be done in the implementation.
You are checking whether a section is zero-page section if its name is ".zp", ".zeropage" or ".directpage".
How about introducing new section target specific flag? It could have a letter "z" in section declaration for example and I think it can be done in the implementation.
- Tue Sep 01, 2020 2:56 pm
- Forum: Programming
- Topic: LLVM for MOS update 2020.08.19
- Replies: 30
- Views: 5926
Re: LLVM for MOS update 2020.08.19
I must say that this is a project that I was looking for for a while now because I'm currently in need of an assembler that will produce reasonably relocatable code. Something that produces ELF files is just perfect!
I have zero LLVM experience. Only manage to compile your sources (I don't think ...
I have zero LLVM experience. Only manage to compile your sources (I don't think ...
- Tue Jan 21, 2020 8:54 am
- Forum: General Discussions
- Topic: Interrupting sequence of one-cycle NOPs
- Replies: 5
- Views: 1979
Re: Interrupting sequence of one-cycle NOPs
Thank you for the elaborate explanation embellished with such colorful hypotheses.
The problem I was trying to solve is on Atari Lynx where the CPU is embedded in a VTI chip so no hardware modification is possible. I'll try to solve it by some fancy modular arithmetics to find the right spot with ...
The problem I was trying to solve is on Atari Lynx where the CPU is embedded in a VTI chip so no hardware modification is possible. I'll try to solve it by some fancy modular arithmetics to find the right spot with ...
- Mon Jan 20, 2020 1:57 pm
- Forum: General Discussions
- Topic: My 3-Chip Design Is Working...
- Replies: 71
- Views: 59788
Re: My 3-Chip Design Is Working...
BigEd wrote:
Welcome to the forum laoo! Please could you re-post in a new thread, with a good title? Don't worry, everyone will see your post.
And then please edit down your post here, so you don't get answers in two places.
(Everyone else: please don't respond in this thread!)
And then please edit down your post here, so you don't get answers in two places.
(Everyone else: please don't respond in this thread!)
- Mon Jan 20, 2020 1:32 pm
- Forum: General Discussions
- Topic: Interrupting sequence of one-cycle NOPs
- Replies: 5
- Views: 1979
Interrupting sequence of one-cycle NOPs
Hi.
I've stumbled recently on curious phenomenon. I'm performing some experiments on Atari Lynx handheld console equipped with 65C02. What I'm trying to accomplish it to synchronize to it's display so that any color register changes will be seen on stable positions on the screen (classic beam ...
I've stumbled recently on curious phenomenon. I'm performing some experiments on Atari Lynx handheld console equipped with 65C02. What I'm trying to accomplish it to synchronize to it's display so that any color register changes will be seen on stable positions on the screen (classic beam ...
- Mon Jan 20, 2020 12:10 pm
- Forum: General Discussions
- Topic: My 3-Chip Design Is Working...
- Replies: 71
- Views: 59788
Re: My 3-Chip Design Is Working...
listed as 2 byte, 2 cycle are 02,22,42,62,82,C2, E2
listed as 1 byte, 1 cycle are X3,OB-BB,EB,FB
listed as 2 byte, 3 cycle is 44
listed as 2 byte, 4 cycle are 54,D4,F4
listed as 3 byte, 8 cycle is 5C
listed as 3 byte, 4 cycle are DC,FC
Folks who find such minutia interesting may wish to ...