The VIC-II chip uses a multiplexed arrangement to access the address bus. What is a good and simple way to demultiplex that bus? I was thinking along the lines of using some kind of IC, but I don't know what it's called. One set of address lines is timed off the CAS signal, the other off the RAS ...

It would be good to know the full source - is it online somewhere?

Now another question regarding the timing signals. In different diagrams and schematics, I'm seeing references to PH0, PH1, and PH2. Some call for a CLK1 and CLK2. I find it very confusing. Is PH0 and PH1 used interchangeably or are they different?

Normally phi0 is the base clock that is fed ...

By this you fix R/W as it was previously probably 0=Write?

I was wondering: is there a document anywhere which breaks down the PLA outputs per opcode per T state? I've only been able to find this , which lists the PLA outputs and the condition which fires them, but that needs a fair bit of processing to turn into a sequence of PLA outputs for each cycle of ...

So in other words it's realistically not doable to have a buffer. It just doesn't solve anything. Having dual CPUs is a possible option, except that it is not software transparent and as a minimum would add several CPU cycles of delay while it handled the request.
Using a buffer that is constantly ...

When the CPU attempts to read those registers it simply fetches them from this buffer.
This will not work e.g. if someone uses SID's internal fibonacchi generator for pseudo random numbers, or accessing VIC's vertical line register to wait for a specific line.
The register itself will change ...

The traditional way to convert a hex nibble

ora #"0"
cmp #"9"+1
bcc done ;skip next op if no further adjustment is needed
adc #"A"-"9"-2 ;one less because of carry is set
done

takes 8 bytes and 8 or 9 cycles - an alternative would be:

CMP #$0A
BCC SKIP
ADC #$66 ; Add $67 (the carry is ...

Hyc, did you have a look here:

http://www.6502.org/tutorials/ - the tutorials of this site

http://codebase64.org/doku.php?id=base:6502_6510_coding - this site might be useful, too (overall it's target is Commodore 64, but this section is 65xx-coding in general).

Happy New Year to everyone!

Is the decimal flag cleared upon interrupt or should I be clearing it in my interrupt handlers?
NMOS doesn't clear decimal flag on IRQ/NMI/BRK/Reset - if you use ADC/SBC in ISR you should clear it there. CMOS has corrected this "feature".

http://www.6502.org ...

If the routine is used for screen output only, then it can be done like that without tampering x/y:


binary
sec
rol ;shift the msb out into carry while shifting in an extra index bit
loop pha ;save the value on stack
lda #"0">>1
rol
jsr CHROUT;print character on screen
pla ;restore value ...

By changing direction (starting with bit 0 instead bit 7) of you can save an index register and some cycles & space:


start equ *

lda <text ;load the hex value low/high byte of a 16-bit word constant.
sta $80 ;store value of a register in memory location 80
lda >text ;high byte
sta $81

lda ...

Merry Christmas!


IRQ, DTR, RTS are outputs, so no need to pull them down.

What do you mean with TxC? 6551 has no such pin. But DTR is missing in your schematics.

The datasheet and the schematics I looked up don't have the capacitor on XTAL.

Did you make sure that TxD and RxD are not swapped? so ...

All good questions!
...
Yes, video needs to be at least capable of a text that is readable on the screen!

Thanks for clarification. So nice graphics would not be enough, some discernable text is mandatory? (I thought about some nice Lissajous graphs :mrgreen: )

Allowing for a microcontroller ...

4) The "computer" must display Video. VGA, NTSC, LCD, etc.
...
Rule (4) - Definition of Video...

Video can be text or graphics in color or monotone. The video display device must be a standard appliance that anyone can get access to. If the video device is a non standard specialty item such as ...