It is interesting .
But now I have 6510 without SYNC.

Thank you.
I do this in 6510 so RDY probably should not bother.

I want to build a functional equivalent of that.
ftp://www.zimmers.net/pub/cbm/schematics/cartridges/c64/freezer/index.html
But in a system where the bank has switched 64K.
The goal is to register the P, PC onto the stack in one bank
A service interupt in another.
Is the detection of 3 consecutive ...

For bank switch, trace debug, freeze, etc...
Whether it will work at all

I wonder why the various processors of that time (intel 8080, 6502, farchild F8) is defined minimum frequency - can not stop the clock, and can be eg. Stop signal RDY.
What is the reason?

I met up with information that CMOS 65c02 stop the clock is possible.

http://archive.6502.org/datasheets/mos_6500_mpu_nov_1985.pdf

Page 5.
NMOS 6502 :
- minimum clock frequency 50 kHz.
- cycle time (for 1 MHz) min Tcyc 1000 ns , max not defined.
- PWH0 max 520 ns

And now 6512
PWH01 :min 430 ns , max not def.
PWH02 :min 470 ns, max not def.

and now the questions ...

I think it would be easier to do this by placing this stack on zero page I / O at the address for example $00
And the instruction STA $00 write data to the stack, and LDA $00 read.

I know this is not 6502.
I want to emulation MOSTEK 3870.
Maybe someone knows how to use a pin TEST, Port 5 and Port 4 for read or debug the ROM?

MichaelM
As you can see, for the time being should work rokazy PHP / PLP and PHA / PLA.
I have yet to come up for JSR and interrupts.

I'm thinking...

1. A stack uses a separate RAM.
2. It may be of any size, limited only by the size of memory used.
3. RAM $ 100- $ 1FF can be used for the program.
Here is a diagram of the first version.
What do you think, about this ?

What do you think , if memory application cache would have , if so, what impact on improving performance?
And what scheme of its operation would be the best ?

It is I, too praise.
This is an example of animation on the hardware c64 (1 MHz).
I added only 16 MB of RAM (Years 90 ') on the SIMM72 and control for systems 74HC .LS, HCT

https://www.youtube.com/watch?v=yxZ7Idi ... e=youtu.be

Forgive me for the stupid question, but in your PDF schematic, why are only 2 wires connected (A8/A9) to the SIMM connector? I think I'm missing something important here.
There already is 74ls173 (DUAL 4-INPUT MULTIPLEXER)
A8 because it really A8 / A18 and A9 => A9 / A19


Pin A10 (the scheme) is ...