I thought about trying half-duplex serial using a single VIA pin that switches between input and output as required. This method pretty much forces a hardware echo (like the KIM-1). I tried this on my version of Karen Orton's SCMP Emulator + NIBL BASIC and it worked well. As a bonus the diode ...

I wrote an interrupt driven full-duplex 9600 demo' for a little 8-pin PIC12F683 (8-MHz INTOSC) that made it onto PICLIST a long time ago. It used interrupts at 3x the bit rate and a relatively simple state machine and I recall the ISR code was nearly isochronous, using approximately 50% of overall ...

I'd like to add an MMU to my design using a 74HC670 "4x4 Register File" IC and I'd like to go straight to a PCB but I'm uncertain about writing to the IC and I'm not in a position to breadboard a 'test' circuit. It seems the write side of the chip is something like a transparent latch that latches ...

I'm curious if you have a particular clock speed in mind?

Could something like this work? Do you need /RD and /WR strobes for other peripheral ICs? I find 64K fast RAM chips on-sale every once in awhile on AliExpress. They're 'pulls' but they've always been in good condition and test good.

Thank you for helping me think through this, guys. Turns out the VIA chip enable is available past the end of a 'pull' clock sequence when ϕ2 remains high and the address lines remain active because the I/O chip enable comes from the address decoder and not from the low-level 'pull' function. So I ...

I use a microcontroller to access RAM and ROM a single clock cycle at a time on my ROM Emulator project and I noticed a problem accessing the VIA chip that way. I issue clock cycles that start and end in the high state to keep non-WDC CPUs static, which also leaves the CPU address and r/w lines ...

I don't see an easy way to get rid of that one gate. I only eliminated it by squeezing the essence of a ROM Emulator into an SBC design which involved using a $2 microcontroller and swapping out the ROM with RAM (keeping the ROM as an 'image store'). The ROM Emulator copies the 64K 'A' or 'B' half ...

I will look into VS code and the Microchip add-ons. Thank you.

I recently came across a 128K I2C EEPROM ($1.27 single quantity @ Mouser) that looks interesting. It might be a nice fit for a ROM Emulator type system where you Load and Run programs or test iterative code in RAM and save to the ROM ...

Your design looks very nice. Thank you for sharing.

May I ask what IDE you're using for the '4809 code, please? If MPLABX, which version? The code is very interesting but swapping banks in and out of the $C000..$FFFF ROM address space for Flash write operations seems like a PITA.

Have you ...

Question, please? Hopefully not too far off topic?

Is there a combination of diodes and active device (bjt, mosfet, 74HCT139 input, etc.) that could be used something like below for a 1-MHz system? I think it would be kind of cool to use 10¢ of small discrete parts tucked into the open frame of an ...

Could you drive the DACA/DACB input with the A0 address line?

The ATF16V8B and ATF22V10 GAL devices seem to be popular choices for address decoders and 'glue' logic. Would a CD74HC688E "8-bit Magnitude Comparator" or CD74HCT688E be worth adding to your list?

You might defer the $16-$17 investment for crystal oscillators and use your Arduino Nano R3 for manually or slow stepping the CPU clock or for generating a 1, 2, 4, or 8 MHz clock during your initial breadboard experiments ...

That CPU-2 board looks very nice. Looking forward to seeing the schematic. Gosh, that ATMega4809 is a monster. May I ask if the signal assignments in the following drawing are correct, please?

Happy Holidays...