It is possible to write one byte at a time, but the byte must be erased


Parallel flash chips (e.g. Spansion) usually need to erase the whole page and you can't erase just a byte, I am not sure about the byte-erase, btw, supposing you can't, I was thinking about a sort of write-back mechanism ...

about the above idea: FeRam-Serial

about parallel NvRam, CY14B108L seems interesting

The serial flash is definitely not random-access


a flash chip is randomly-accessable ONLY in read mode, there is no problem about that
troubles come when you have to write because you have to erase things "per page" before you can write on it
this makes flash writable per page-oriented instead ...

ummm, I'd rather avoid the flash technology if it's possible, I do not like it at all

I can put a CPLD in the middle
in order to translate an asynchronous data access into synchronous SPI serial access
with a FIFO under the hood, of course

p.s.
no problems with voltage level shifters

oh, good, and interesting, with two of those modules I will be completed

Image no longer available: https://www.imageupload.co.uk/images/2016/01/29/idp-ram-disk.png
I am trying to add a storage device to my board, I'd like to have something as big as possible
my board has 5 slots, each slot is capable to address up to 16 Mbyte over a 32bit parallel bus

currently in ...

yes, but it takes effort and skills, and so I ask

SoftTec has a great EPROM emulator, but it's LPT driven

hi
I am designing a 6809 board with Eagle/CAD, I can't find a valid device XC95144 & XC95108 (they are 5V CPLD), I have found an old library called XILINX.lib but my Eagle v7.2 says that it's too old. Does anyone happen to have a library with these XC95xxx device on hand ?

thank you in advance

I might implement these features :D

actually I am working on advanced lexer, planning to support an advanced interpreter (with functions, type checking, etc)


# eval 1+(2.2*3.0E9+ ( 0xdeadbeaf logicalAnd 0xffffffff ) )

yards analysis: PASSED
stack analysis: PASSED

rpn_v[]={ 0 3 5 4 8 10 9 6 1 ...

I have been coding for weeks a little lexer, now it's quite working and I have also implemented an RPN parser
it looks this way (I have posted a few lines)

is there any source of your project ?

any comment ?

i added a sub-repo with a standalone project about a mini calculator

i added few examples



Program factorial
Begin
Input n
factorial = 1
While n > 1
Begin
factorial = factorial * n
n = n - 1
End
Output factorial
End



Program test_prime
Begin
Input n
c = 2
is_prime = 1
While (c < n / 2) & is_prime
Begin
If n % c == 0
Begin
is_prime = 0
End ...

i have redesigned the VDU V9958 (and its package 1.778mm) as Eagle/CAD library's item