Just want to add some enthusiastic support for this project - Chris has achieved something I hadn't thought possible, since, not only does it dynamically recompile 6502 into native x86 code as it encounters it, but also maintains a runtime system emulation layer (in this case, emulating the BBC ...

Here are the results of the table-based approach.

First of all, the tables. They are page-aligned and need 2.5k:

multablo - lsb of x*x/4 for x=0..511
multabhi - msb of x*x/4 for x=0..511
multablo2 - lsb of (x-255)*(x-255)/4 for x=0..511
multabhi2 - msb of (x-255)*(x-255)/4 for x=0..511
reciptablo ...

Not exactly but I found a previous thread where Bruce chimes in:
integer division and multiplication


Edit: if you have fast multiplication sorted out, maybe try Goldschmidt division .
Thanks for links Ed! Will try digesting that with a coffee! A skim read suggests that Goldschmidt division ...

Hmm, I don't think your code is equivalent - specifically, the algorithm needs to always subtract if left-shifting the numerator at the top of the loop shifted a set bit out. Unfortunately I can't think of a neat way to express that in your code without ruining its sleekness!

Example output:

930 ...

Okay, so here's a quick and dirty version of compare-and-conditional-subtract, in which the subtraction itself is also the comparison:
That's a nice way to do it - thanks! I've used a similar trick when consuming data bit-by-bit (to determine when you need to buffer your next byte of data without ...

Tomorrow I'm going to try the following:

A reciprocal table of 16-bit precision: f(x)=65535/x for x=0..255.
The usual difference of squares multiplication table: f(x)=x*x/4 for x=0..511

To divide unsigned A/B, first shift down both until the highest bit in B is at bit 7. Since typically the values ...

I haven't been here for a while! Just amusing myself with a little 6502 prototype during these strange lockdown days.

I hadn't come across your large tables page before, and, while I don't have much more than about 4k to spend on tables, I've convinced myself that "difference of squares ...

Thanks Garth!

Yes, of course I went to the usual places to see what was already on the 6502.org site, and I'm painfully aware that 6502 division is a FAQ, but I figured my needs were sufficiently distinct from the "generic" 32-bit/16-bit division code that it was worth starting a topic on it.

I've ...

Not sure really what you mean there Ed - do you have an example?

The next thing I tried was to try forcing the dividends to be 8-bit in length by shifting them both until the highest set bit of the denominator is at bit 7 of the 8-bit input.
divide:
LDA denom_hi
BMI done_shifting
shiftloop ...

Collective groan from the 6502.org community.

But wait! I'm just wondering if I can improve on what I've got, and there's no better collection of minds than here.

So, I have two unsigned 16-bit values A and B, where A<B, and I want to compute A/B to 8-bit fractional precision.

My starting point ...

Surely the right way up is whichever way puts this bit the right way up:



...which in this case is PLA at the top.

In the first case, the IR isn't getting a BRK instruction inserted into it at first, but it is going through the timing of an interrupt sequence. So the LDA# logic is firing for all those cycles, hence moving whatever's on the data bus into A.

Hard to understand exactly what's going on in the ...

Has there ever been any discussion on the behaviour of the RESET interrupt on the 6502? I had always expected it to behave exactly like the IRQ and NMI interrupts (albeit with stack reads instead of writes), but Visual6502 shows some strange things.

Here we see A getting corrupted:
http ...

Yes, that makes sense. I'm not sure what internal model Visual6502 uses, but I guess certain quantisation issues will give different results when the timing is as fine as this.

Still, interesting to see some operational differences between NMOS and CMOS variants, and not just instruction set ...

- the minimum interrupt latency is only one clock cycle (elsewhere I'd seen this stated as two clock cycles)

How are you getting one clock cycle latency?

Here's the lowest latency I can get out of Visual 6502:
http://visual6502.org/JSSim/expert.html?r=00f9&a=00f9&d ...