Need Help with some UARTs

[Yuri]

So I have been following the Ben Eater videos and grabbed some 65xx chips and had a go with some bread boards. I've gotten a fairly workable solution with an old LCD module and some other various parts I had for a different build I was working on.

Everything seems reasonably stable, at least until I tried hooking up a 65C51. Once I did that I started getting odd memory writes to places that memory shouldn't be written to.

I tried two different 65C51 chips but they both exhibited the same behavior. Even made a simple counting program that just counts 16-bits in the zero page, and reads a few extra bytes in and around that
area and you can see where it corrupts those other bytes; this only happens while the 65C51 is in the circuit. Remove it and the program works flawlessly for hours.

In desperation I also got a set of 16550s to see if I would get better behavior out of them. Those seemed to work at first, but now it seems I get random lock ups and other weird memory issues as well. So I'm hesitant to put the blame on the 65C51s at this point if the 16550s are also having the similar, if slightly different, problems.

I've tried replacing various other components to the point that I'm down to just replacing the 6502 itself, but that seems silly. I'm running it at about 6.3MHz normally, 25.175/4 as that's what I had available. I've tried lowering this down to /16 to see if that helps and it didn't seem to have an effect at all.

I've attached a PDF of the circuit that I'm using. I'll post some PNGs of the bread board if you need to take a look, but it's kinda messy.

Thanks

[Dr Jefyll]

Yuri wrote:

I'll post some PNGs of the bread board if you need to take a look, but it's kinda messy.

Yes, please do. And BTW it's best if you attach those images with your post. Please don't use a third-party image hosting site.

Although it may seem as if the UART is responsible for your trouble, it's also possible your project was just barely working in the first place -- on the ragged edge, so to speak -- and that almost any change could upset the apple cart.

Shortcomings in the ground and power distribution network (including bypass capacitors) are one potential source of erratic operation. Low-quality breadboards are another, since any mechanical disturbance can cause a marginal connection to worsen.

-- Jeff

ps- welcome!

[Yuri]

Dr Jefyll wrote:

Yuri wrote:

I'll post some PNGs of the bread board if you need to take a look, but it's kinda messy.

Yes, please do. And BTW it's best if you attach those images with your post. Please don't use a third-party image hosting site.

Sure thing.

Quote:

Although it may seem as if the UART is responsible for your trouble, it's also possible your project was just barely working in the first place -- on the ragged edge, so to speak -- and that almost any change could upset the apple cart.

Shortcomings in the ground and power distribution network (including bypass capacitors) are one potential source of erratic operation. Low-quality breadboards are another, since any mechanical disturbance can cause a marginal connection to worsen.

This is entirely possible, I did have a devil of a time getting the memory to behave at all and tried several revisions to my circuit before I got it stable. I've tried to sprinkle various 0.1uF caps around the power rails of the board, and even added some 4.7uF electrolytics near things I thought might be power hungry. (Like the LCD backlight)

I measured the power rails with my multi-meter and got somewhere around 5.05V consistently, across all of the boards, so I don't think the power supply itself is an issue. There's a tiny bit of ripple I can see on my oscilloscope (assuming I'm using it correctly), but it looks mostly like minor fluctuations from either the clock or the wall outlet, almost not enough to measure though.

Quote:

ps- welcome!

Thank you! :3

Despite my set backs I'm really enjoying this project; and I've gleaned a lot of info from reading the site/forums.

[BigDumbDinosaur]

Yuri wrote:

So I have been following the Ben Eater videos...I've attached a PDF of the circuit that I'm using.

When I opened the PDF, there was the page border, title block and a bunch of dots—no schematic.

[barnacle]

Strange - I can see it fine - perhaps the Yuri reloaded it?

Anyways: I'm looking to try and work out what's going on with the clock. (As an aside: it's much easier to read a schematic if you choose symbols which reflect the function of the part, rather than the actual pinout as has been done here. Using Vcc and GND symbols rather than looping those connections around the part can also help!)

That said: it looks as if you've got something interesting going on there, but I'm not at all certain quite what it is. I think that you're using the push buttons to single step - or at least, single clock? - in some circumstances. Could you perhaps explain?

As Jeff pointed out: decoupling capacitors are essential, and while you tell us you've applied some, there are none shown on the circuit diagram. I'd certainly have some around the 1.8MHz oscillator block and the 6551: probably 100nF *close* to each part's power pins. 10nF or 100nF across the power input of *every* chip is a good idea but you probably don't need anything bigger except perhaps where the power comes into the board; sometimes too big doesn't help either.

Kudos for pulling up/down unused inputs (and for indicating unused outputs!) - Open TTL inputs should pull high, but CMOS (HC) inputs don't as a rule, so actively connecting unused inputs is a very good idea.

And let me echo Jeff's comment on breadboards. Personally, I hate 'em and won't use them beyond the most trivial of test circuits. I take the view that PCBs are cheap enough and fast enough to prototype on them, though I appreciate that them might seem a bit daunting at first: the major advantage is that if something doesn't work, either your soldering wasn't up to scratch, or your original circuit diagram was wrong. Particularly with through-hole parts, it's easy to fit a socket and bend a leg out if you need to change a design

Neil

[BigDumbDinosaur]

Dr Jefyll wrote:

Although it may seem as if the UART is responsible for your trouble, it's also possible your project was just barely working in the first place -- on the ragged edge, so to speak -- and that almost any change could upset the apple cart...

Jeff’s comment prompted me to closely examine the images of your unit. In doing so, I spotted something that may be contributing to the instability, which is the use of 74F logic. 74F devices are technically incompatible with standard CMOS devices, with the 74F VOH level being below what constitutes a valid logic 1 in CMOS. The WDC 65C02 has some tolerance for that, but I suspect the 65C51 and possibly the 65C22 don’t.

Another concern is 74F logic outputs are extremely aggressive (the ‘F’ in 74F means “fast”—and they’re not kidding), with transition times in the low single-digit nanosecond range. Very fast edges are usually not compatible with breadboard and the long wires used with it. In your application, slower edges would be better so you can avoid transmission line effects with your wiring and resulting timing problems. I recommend you replace any TTL logic on the board with 74HC parts. 74HC is plenty fast at the Ø2 rate you are running and will produce less aggressive edges.

Also, try to get everything as close together as possible. Long wires distort signal edges and may induce ringing. The latter, in turn, may cause double-strobing or clocking of some parts, resulting in random failures that will drive you to drink.

Lastly, and as others note, you need a bypass capacitor on every piece of silicon.

[BigDumbDinosaur]

barnacle wrote:

Strange - I can see it fine - perhaps the Yuri reloaded it?

I loaded it into Adobe Acrobat (not the reader, the full Acrobat package) and it came up the same way. There’s something in that file that appears to be incompatible with the Adobe software I have here.

[GARTHWILSON]

Be sure to go through the 6502 primer at http://wilsonminesco.com/6502primer/ which is about the many aspects of building your own 6502 computer.  There are quite a few things here that are addressed in the primer, and you may have some "Ah-hah!" moments.

[Paganini]

That is some beautiful breadboarding!

At the risk of answering a question you didn't ask, I don't think you need that gate delay for your RAM select.

One suggestion for making your schematic more readable is to use logic symbols instead of IC pinouts for your logic gates.

Second what BDD says about using the right logic family for breadboards. I tried using AHCT on breadboards one time... it did not go super well!

Beyond that (if using 74HC and adding decoupling doesn't fix things), did you double-check the logic of your address decoding? It might be a good idea to sit down with a pen and paper and exhaustively go through it. Make truth tables for all of your line decoders / logic gates; manually simulate your device selection; make sure that your inputs produce the expected outputs. Then check the actual hardware, especially around the ACIA. Does every wire in the breadboard go where the schematic says it does?

[Yuri]

BigDumbDinosaur wrote:

Yuri wrote:

So I have been following the Ben Eater videos...I've attached a PDF of the circuit that I'm using.

When I opened the PDF, there was the page border, title block and a bunch of dots—no schematic.

The attachment blank_page.gif is no longer available

It was an export from EasyEDA so it's entirely possible they didn't do the PDF right. I've attached some PNGs. (Problem is the EasyEDA software wants to make those color *shrug*)

[Yuri]

barnacle wrote:

Anyways: I'm looking to try and work out what's going on with the clock. (As an aside: it's much easier to read a schematic if you choose symbols which reflect the function of the part, rather than the actual pinout as has been done here. Using Vcc and GND symbols rather than looping those connections around the part can also help!)

Yea, I'm still learning how to use EasyEDA (or any software for that matter) to lay this out, and didn't see how to load in the symbols instead of just the parts.

Quote:

That said: it looks as if you've got something interesting going on there, but I'm not at all certain quite what it is. I think that you're using the push buttons to single step - or at least, single clock? - in some circumstances. Could you perhaps explain?

As for how it works:
The 25.175MHz oscillator is feed into a 4-bit counter that I'm using as a clock divider; right now the main circuit is taking it's input from the divide by 2 pin which gives me a clock frequency of around 6.3MHz (which should be in spec for the 65C02 and 65C22). The other bits are used to stop the clock and single step as you figured out. In the physical circuit, the red switch is a manual reset, the green switch selects if I'm using the oscillator clock or the manual clock, and the yellow switch is my manual clock which let's me single step the circuit.

All of that appears to be working quite well.

Quote:

As Jeff pointed out: decoupling capacitors are essential, and while you tell us you've applied some, there are none shown on the circuit diagram. I'd certainly have some around the 1.8MHz oscillator block and the 6551: probably 100nF *close* to each part's power pins. 10nF or 100nF across the power input of *every* chip is a good idea but you probably don't need anything bigger except perhaps where the power comes into the board; sometimes too big doesn't help either.

Yep, they hadn't been drawn into the circuit I have going into EasyEDA yet, but if you look closely there are plenty of little yellow ceramics on the power rails of the breadboards. I've tried to add at least one near the power rail and sometimes also to the ground rails. Again, for the things I suspected might be power hungry I added some beefier 4.7 electrolytics. (There aren't a lot of those though.)

Not everything on the breadboard is on the circuit, such as the LCD which won't end up in my final design. My goal was to get the general circuit working on the breadboard and then see about designing a PCB (perhaps in an ITX or Mini ATX layout so I can put it in a case) and doing additional prototyping either with some edge connectors or some kind of GPIO type cable or something.

Quote:

Kudos for pulling up/down unused inputs (and for indicating unused outputs!) - Open TTL inputs should pull high, but CMOS (HC) inputs don't as a rule, so actively connecting unused inputs is a very good idea.

Thank you. ^^
I had read (or saw in a video) you should keep those from floating so they don't constantly switch back and forth and cause extra noise, so I've tried to be diligent with keep those tied either high or low, even on my breadboards.

Quote:

And let me echo Jeff's comment on breadboards. Personally, I hate 'em and won't use them beyond the most trivial of test circuits. I take the view that PCBs are cheap enough and fast enough to prototype on them, though I appreciate that them might seem a bit daunting at first: the major advantage is that if something doesn't work, either your soldering wasn't up to scratch, or your original circuit diagram was wrong. Particularly with through-hole parts, it's easy to fit a socket and bend a leg out if you need to change a design

I don't blame you. I have a few cheep breadboards and instantly regretted using them; again, I'd like to get a PCB designed up, but wanted to get a pass at a working circuit first so I could have a stable system to design other things for it. (Keyboard, video hardware, anything else I can dream up)

[BigDumbDinosaur]

Yuri wrote:

It was an export from EasyEDA so it's entirely possible they didn't do the PDF right. I've attached some PNGs. (Problem is the EasyEDA software wants to make those color *shrug*)

Sorry, I can't read those.

[Yuri]

Paganini wrote:

That is some beautiful breadboarding!
At the risk of answering a question you didn't ask, I don't think you need that gate delay for your RAM select.

I may not, this was me trying to trouble shoot if there was a timing issue that was causing my problem.

Quote:

Second what BDD says about using the right logic family for breadboards. I tried using AHCT on breadboards one time... it did not go super well!

Beyond that (if using 74HC and adding decoupling doesn't fix things), did you double-check the logic of your address decoding? It might be a good idea to sit down with a pen and paper and exhaustively go through it. Make truth tables for all of your line decoders / logic gates; manually simulate your device selection; make sure that your inputs produce the expected outputs. Then check the actual hardware, especially around the ACIA. Does every wire in the breadboard go where the schematic says it does?

I'll get some HC parts, the F and AHCT parts were for doing some video circuitry where the timing is a bit tighter; I wasn't aware (until BDD pointed it out) that the logic levels were different. I was wondering about the timings if they were an issue. I figured faster timings would be less of an issue not more, but I'm more of a software guy not a hardware guy.

As for the logic, I ran through the decoding with Logisim and mapped everything out quite carefully. I'm 90% sure the decoding is correct. The memory map should looks as such:

0000-7FFF : Page 0 (32Kbyte, RAM, CS# is run strictly off the A15 line of the 65C02)

Other pages are divided into 4x8Kbyte chunks with a 74139, which is enabled when A15 goes high

8000-9FFF : Page 1 (8Kbyte, Hardware IO, further subdivided into 8x1Kbyte blocks for each device using a 74138)
- 8000-83FF : Device 1 (65C22)
- 8400-87FF : Device 2 (Serial)
- (and so on)
A000-BFFF : Page 2 (8Kbyte, unmapped for now, will probably use this for video and/or sound paging later)
C000-DFFF : Page 3 (8Kbyte, unmapped for now, another gap to play with in the future)
E000-FFFF : Page 4 (8Kbyte ROM)

Everything responds to where it needs to be up until I add the serial port to the mix and then it all goes pear shaped.

[BigEd]

Yuri wrote:

if you look closely there are plenty of little yellow ceramics on the power rails of the breadboards. I've tried to add at least one near the power rail and sometimes also to the ground rails. Again, for the things I suspected might be power hungry I added some beefier 4.7 electrolytics. (There aren't a lot of those though.)

Just to note: the two commonly-seen kinds of capacitors are doing slightly different jobs, as I understand it. So I'd expect to see one (or maybe two) electrolytics placed where DC power comes to the board, whereas the smaller bypass capacitors are placed next to each chip, across the power pins of that chip. (What I mean is, don't just think of the electrolytics as bigger - there's more to it than that. Perhaps think of them as big and slow, with the bypass caps being small and fast.)

[BigDumbDinosaur]

Yuri wrote:

I'll get some HC parts, the F and AHCT parts were for doing some video circuitry where the timing is a bit tighter; I wasn't aware (until BDD pointed it out) that the logic levels were different. I was wondering about the timings if they were an issue. I figured faster timings would be less of an issue not more, but I'm more of a software guy not a hardware guy.

Some reading material attached for you.

74F is considered obsolete for new designs, as is also true of 74ALS, 74L, 74LS and 74S. I generally recommend 74HC(T), 74AHC(T) and 74AC, in that order, for hobby use. 74AHC(T) and 74AC(T) have comparable propagation times. 74AHC(T), however, has slower edges than 74AC(T), more like 74HC(T) edges.

Also, to be considered are the single-gate families, which are handy in space-constrained designs.

ti_logic_families.pdf

TI Logic Families

(4.77 MiB) Downloaded 211 times

ti_little_logic.pdf

TI Little Logic

(4.31 MiB) Downloaded 191 times