6502 Instruction timing tester

Topics pertaining to the emulation or simulation of the 65xx microprocessors and their peripheral chips.
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dp11
Posts: 33
Joined: 11 Nov 2017

6502 Instruction timing tester

Post by dp11 »

I've created a 6502 /65C02/65C12 instruction timing checking test suite.

It first of all targeted BBC micro and Master machines ( which have been checked against real hardware). I've extended it to support C64 , but this hasn't yet been checked against real hardware. It passes in VICE , but not in MAME so one of them is in error.

It should be reasonably easy to add other targets. It requires some sort of "putc" function and a timer e.g. 6522 VIA timer.

Hopefully people will find it useful.

https://github.com/dp111/6502Timing
dp11
Posts: 33
Joined: 11 Nov 2017

Re: 6502 Instruction timing tester

Post by dp11 »

I've added vectors to the beginning of the code to make it easier to port the test to another system. Now you just need to patch the vectors with putchar, start timer and read timer, instead of building the code.
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BigEd
Posts: 11463
Joined: 11 Dec 2008
Location: England
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Re: 6502 Instruction timing tester

Post by BigEd »

Thanks Dominic!

As this tester has shown up issues in (almost?) all Acorn emulators, it feels like it's worth running against emulators of other machines. (Although, I think some of the problems have been in modelling clock-stretching or RDY usage, and in the precise timing of each memory access - some systems might be simple enough that they don't need to be accurate at this level.)
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