6522 Peripheral Control Register - setting CA2 and CB2 high?
Posted: Tue Jun 07, 2022 9:03 am
I'm continuing investigating the 65c02 Single Board Computer from WDC.
Here's the latest "puzzle":
I'm trying to access the EPROM banks, and apparently these are switched using the two uppermost lines. They are not actually part of the address bus, but are controlled by one of the two 65c22 on the board.
Specifically, the 4 EPROM banks are selected based on one of 4 possible high/low conditions of FA15 and FAMS. FA15 is connected to the 6522 CA2 and FAMS is connected to CB2. They also have LEDs to indicate status.
So, looking at the memory map for the board (page 6 on datasheet), it indicates the "VIA-TIDE" (as opposed to the other VIA, which is called "VIA port") starts at $7FE0
https://www.westerndesigncenter.com/wdc ... C02SXB.pdf
So, looking at the 6522 (65c22) data sheet (page 8 on data sheet), the Peripheral Control Register (PCR) is at +C offset from the base address, so that's $7FEC.
https://www.westerndesigncenter.com/wdc ... w65c22.pdf
Looking at the table for the PCR bits, CB2 and CA2 are configured by bits 7,6,5 and 3,2,1 respectively.
Page 12, datasheet
If I set all the bits for them to 1, these two lines ought to be forced to be HIGH OUTPUT.
However, I have done that using the monitor program, directly writing to $7FEC with various values, all which turn on the relevant CA2 and CB2 bits.
00
0E
70
and 7E
but the LEDs on those lines do not light up.
Do I need to do anything else to make CA2 and CB2 go high?
Here's the latest "puzzle":
I'm trying to access the EPROM banks, and apparently these are switched using the two uppermost lines. They are not actually part of the address bus, but are controlled by one of the two 65c22 on the board.
Specifically, the 4 EPROM banks are selected based on one of 4 possible high/low conditions of FA15 and FAMS. FA15 is connected to the 6522 CA2 and FAMS is connected to CB2. They also have LEDs to indicate status.
So, looking at the memory map for the board (page 6 on datasheet), it indicates the "VIA-TIDE" (as opposed to the other VIA, which is called "VIA port") starts at $7FE0
https://www.westerndesigncenter.com/wdc ... C02SXB.pdf
So, looking at the 6522 (65c22) data sheet (page 8 on data sheet), the Peripheral Control Register (PCR) is at +C offset from the base address, so that's $7FEC.
https://www.westerndesigncenter.com/wdc ... w65c22.pdf
Looking at the table for the PCR bits, CB2 and CA2 are configured by bits 7,6,5 and 3,2,1 respectively.
Page 12, datasheet
If I set all the bits for them to 1, these two lines ought to be forced to be HIGH OUTPUT.
However, I have done that using the monitor program, directly writing to $7FEC with various values, all which turn on the relevant CA2 and CB2 bits.
00
0E
70
and 7E
but the LEDs on those lines do not light up.
Do I need to do anything else to make CA2 and CB2 go high?